Searched full:banked (Results 1 – 18 of 18) sorted by relevance
/freebsd/sys/arm/arm/ |
H A D | setstack.S | 55 * to that mode update the banked r13 and then switch back. 75 * to that mode copy the banked r13 and then switch back.
|
/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | gpio-davinci.yaml | 49 The interrupts are specified as per the interrupt parent. Only banked 51 banked then provide list of interrupts corresponding to each bank, else
|
H A D | gpio-davinci.txt | 21 - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
|
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | arm,gic.yaml | 119 regions, used when the GIC doesn't have banked registers. The offset
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Utils/ |
H A D | ARMBaseInfo.h | 225 // Banked Registers
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSystemRegister.td | 128 // Banked Registers
|
H A D | ARMInstrInfo.td | 5808 // However, the MRS (banked register) system instruction (ARMv7VE) *does* have a 5810 def MRSbanked : ABI<0b0001, (outs GPRnopc:$Rd), (ins banked_reg:$banked), 5811 NoItinerary, "mrs", "\t$Rd, $banked", []>, 5813 bits<6> banked; 5817 let Inst{22} = banked{5}; // R bit 5819 let Inst{19-16} = banked{3-0}; 5822 let Inst{8} = banked{4}; 5862 // However, the MSR (banked register) system instruction (ARMv7VE) *does* have a 5864 def MSRbanked : ABI<0b0001, (outs), (ins banked_reg:$banked, GPRnopc:$Rn), 5865 NoItinerary, "msr", "\t$banked, $Rn", []>, [all …]
|
H A D | ARMInstrThumb2.td | 4500 def t2MRSbanked : T2I<(outs rGPR:$Rd), (ins banked_reg:$banked), 4501 NoItinerary, "mrs", "\t$Rd, $banked", []>, 4503 bits<6> banked; 4507 let Inst{20} = banked{5}; // R bit 4508 let Inst{19-16} = banked{3-0}; 4512 let Inst{4} = banked{4}; 4557 // However, the MSR (banked register) system instruction (ARMv7VE) *does* have a 4559 def t2MSRbanked : T2I<(outs), (ins banked_reg:$banked, rGPR:$Rn), 4560 NoItinerary, "msr", "\t$banked, $Rn", []>, 4562 bits<6> banked; [all …]
|
H A D | ARMScheduleA57.td | 133 "(t2)?MRRC(2)?$", "(t2)?MRS(banked|sys|_AR|_M|sys_AR)?$", 134 "(t2)?MSR(banked|i|_AR|_M)?$")>;
|
H A D | ARMISelDAGToDAG.cpp | 5393 // Maps a Banked Register string to its mask value. The mask value returned is 5394 // for use in the MRSbanked / MSRbanked instruction nodes as the Banked Register
|
H A D | ARMBaseInstrInfo.cpp | 151 // banks banked on bit 2. Assume that TCMs are in use. in CreateTargetMIHazardRecognizer()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMInstPrinter.cpp | 993 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand() local 994 auto TheReg = ARMBankedReg::lookupBankedRegByEncoding(Banked); in printBankedRegOperand() 995 assert(TheReg && "invalid banked register operand"); in printBankedRegOperand() 998 uint32_t isSPSR = (Banked & 0x20) >> 5; in printBankedRegOperand()
|
/freebsd/sys/dev/fb/ |
H A D | vga.c | 2245 * Change the origin (window mapping) of the banked frame buffer.
|
/freebsd/share/dict/ |
H A D | web2a | 17426 double-banked 23748 full-banked 26815 half-banked 54744 single-banked 63285 terrace-banked 67872 twi-banked 71641 well-banked 73333 wide-banked
|
H A D | web2 | 18333 banked
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4019 OS << "<banked reg: " << getBankedReg() << ">"; in print() 5312 /// parseBankedRegOperand - Try to parse a banked register (e.g. "lr_irq") for 5315 // Don't parse two Banked registers in a row in parseBankedRegOperand()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 5083 // The table of encodings for these banked registers comes from B9.2.3 of the in DecodeBankedReg()
|
/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | AttrDocs.td | 2225 non-banked registers that are used, so that upon return the user-mode state
|