| /freebsd/sys/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
10 ADF435x Reference Clock (CLKIN).
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
[all …]
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| H A D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
26 description: Clock to provide CLKIN reference clock signal.
28 clock-names:
31 '#clock-cells':
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | cn9131-cf-solidwan.dts | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com>
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 #include "cn9130-sr-som.dtsi"
29 #include "armada-cp115.dtsi"
41 compatible = "solidrun,cn9131-solidwan",
42 "solidrun,cn9130-sr-som", "marvell,cn9130";
67 compatible = "gpio-leds";
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| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_serdes_interface.h | 9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
95 /** Serdes loopback mode */
103 * No clock used (untimed)
109 * CDR recovered bit clock used (without attenuation)
115 * CDR recovered bit clock used (only through IO)
122 * CDR recovered bit clock used
168 /** SerDes power mode */
178 * Tx de-emphasis parameters
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| /freebsd/sys/contrib/alpine-hal/eth/ |
| H A D | al_hal_eth_mac_regs.h | 1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
434 /* [0x68] Clock configuration */
473 /* [0x8] PCS clock divider configuration */
482 /* [0x4] EEE, number of times the MAC went into low power mode */
484 /* [0x8] EEE, number of times the MAC went out of low power mode */
592 /* [0x58] Preamble configuration (high [55:32]) */
611 * [0x7c] SERDES 32-bit interface shift configuration (when swap is
616 * [0x80] SERDES 32-bit interface shift configuration (when swap is
621 * [0x84] SERDES 32-bit interface bit selection
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| /freebsd/sys/dev/ic/ |
| H A D | cd1400.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * cyclades cyclom-y serial driver
46 #define CD1400_CAR_CHAN (3<<0) /* channel select */
59 #define CD1400_RIR_CHAN (3<<0) /* channel select */
63 #define CD1400_TIR_CHAN (3<<0) /* channel select */
67 #define CD1400_MIR_CHAN (3<<0) /* channel select */
108 #define CD1400_CCR_SC (7<<0) /* special char 1-4 */
110 #define CD1400_CCR_XMTEN (1<<3) /* tx enable */
112 #define CD1400_CCR_RCVEN (1<<1) /* rx enable */
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| /freebsd/sys/dev/bfe/ |
| H A D | if_bfereg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
38 #define BFE_PFE 0x00000080 /* Pattern Filtering Enable */
41 #define BFE_PME 0x00001000 /* PHY Mode Enable */
42 #define BFE_PMCE 0x00002000 /* PHY Mode Clocks Enable */
46 #define BFE_BIST_STAT 0x0000000C /* Built-In Self-Test Status */
71 #define BFE_CTRL_CRC32_ENAB 0x00000001 /* CRC32 Generation Enable */
79 #define BFE_FLOW_PAUSE_ENAB 0x00008000 /* Enable Pause Frame Generation */
87 #define BFE_TX_CTRL_ENABLE 0x00000001 /* Enable */
89 #define BFE_TX_CTRL_LPBACK 0x00000004 /* Loopback Enable */
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| /freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300reg.h | 32 /* MAC Control Register - only write values of 1 have effect */
34 #define AR_CR_LP_RXE 0x00000004 // Receive LPQ enable
35 #define AR_CR_HP_RXE 0x00000008 // Receive HPQ enable
37 #define AR_CR_SWI 0x00000040 // One-shot software interrupt
47 #define AR_CFG_AP_ADHOC_INDICATION 0x00000020 // AP/adhoc indication (0-AP 1-Adhoc)
49 #define AR_CFG_CLK_GATE_DIS 0x00000400 // Clock gating disable
55 /* Rx DMA Data Buffer Pointer Threshold - High and Low Priority register */
70 /* MAC Global Interrupt enable register */
72 #define AR_IER_ENABLE 0x00000001 // Global interrupt enable
124 #define AR_RXCFG_ZLFDMA 0x00000010 // Enable DMA of zero-length frame
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| H A D | ar9300_reset.c | 34 /* Additional Time delay to wait after activiting the Base band */
121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
125 /* Adjust various register settings based on half/quarter rate clock setting.
140 if (IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { /* fast clock */ in ar9300_set_ifs_timing()
152 if (IS_5GHZ_FAST_CLOCK_EN(ah, chan)) { /* fast clock */ in ar9300_set_ifs_timing()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
234 * In 20/40 phy mode, the center frequency is in ar9300_get_channel_centers()
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| /freebsd/share/misc/ |
| H A D | usb_hid_usages | 4 # - lines that do not start with a white space give the number and name of
6 # - lines that start with a white space give the number and name of
20 0x08 Multi-axis Controller
36 0x3E Select
55 0x89 System Menu Select
62 0x90 D-pad Up
63 0x91 D-pad Down
64 0x92 D-pad Right
65 0x93 D-pad Left
107 0xB2 Anti-Torque Control
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| H A D | usb_vendors | 6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-04-01 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
62 0200 TP-Link
81 120e ASI120MC-S Planetary Camera
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| /freebsd/sys/contrib/dev/athk/ath10k/ |
| H A D | targaddrs.h | 1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
67 /* Clock and voltage tuning */
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
143 /* 0xbc - [31:0]: idle timeout in ms */
150 /* If non-zero, override values sent to Host in WMI_READY event. */
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| /freebsd/sys/gnu/dev/bwn/phy_n/ |
| H A D | if_bwn_phy_n_regs.h | 22 Boston, MA 02110-1301, USA.
32 /* N-PHY registers. */
39 #define BWN_NPHY_BANDCTL BWN_PHY_N(0x009) /* Band control */
40 #define BWN_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */
41 #define BWN_NPHY_4WI_ADDR BWN_PHY_N(0x00B) /* Four-wire bus address */
42 #define BWN_NPHY_4WI_DATAHI BWN_PHY_N(0x00C) /* Four-wire bus data high */
43 #define BWN_NPHY_4WI_DATALO BWN_PHY_N(0x00D) /* Four-wire bus data low */
44 #define BWN_NPHY_BIST_STAT0 BWN_PHY_N(0x00E) /* Built-in self test status 0 */
45 #define BWN_NPHY_BIST_STAT1 BWN_PHY_N(0x00F) /* Built-in self test status 1 */
83 #define BWN_NPHY_C1_CLIP1_HIGAIN BWN_PHY_N(0x021) /* Core 1 clip1 high gain code */
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| /freebsd/sys/dev/e1000/ |
| H A D | e1000_regs.h | 2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
[all …]
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| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | reg_addr.h | 2 * Copyright (c) 2017-2018 Cavium, Inc.
52 … 0x001d10UL //Access:RW DataWidth:0x1 // Disable rasdp error mode check
73 … 0x003818UL //Access:RW DataWidth:0x6 // Statistic mask enable Bit5 : Mask Messa…
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
98 … (0x1<<0) // I/O space access enable. There are no I/O…
[all …]
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| /freebsd/contrib/wpa/src/drivers/ |
| H A D | nl80211_copy.h | 6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
13 * Copyright 2015-2017 Intel Deutschland GmbH
14 * Copyright (C) 2018-2023 Intel Corporation
32 * be careful not to break things - i.e. don't move anything around or so
74 * - a setup station entry is added, not yet authorized, without any rate
76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid
79 * - %NL80211_TDLS_ENABLE_LINK is then used
80 * - after this, the only valid operation is to remove it by tearing down
95 * Frame registration is done on a per-interface basis and registrations
137 * software, like the AP-VLAN type in mac80211 for example, there's
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| /freebsd/contrib/ntp/util/ |
| H A D | tg2.c | 6 * broadcast timecode. Alternatively, it can generate the IRIG-B
18 * by the intrinsic frequency error of the codec sample clock, which can
24 * over the range 0-255. The signal generator by default uses WWV
26 * switches to IRIG-B format.
29 * for the signal generator is read from the computer system clock when
42 * the transmissionorder is low-order first as the frame is processed
44 * For IRIG the on-time marker M preceeds the first (units) bit, so its
54 * v0.23 2007-02-12 dmw:
55 * - Changed statistics to include calculated error
60 * v0.22 2007-02-08 dmw:
[all …]
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| /freebsd/sys/dev/ral/ |
| H A D | rt2661.c | 2 /*-
20 /*-
70 if (sc->sc_debug > 0) \
74 if (sc->sc_debug >= (n)) \
204 struct ieee80211com *ic = &sc->sc_ic; in rt2661_attach()
208 sc->sc_id = id; in rt2661_attach()
209 sc->sc_dev = dev; in rt2661_attach()
211 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, in rt2661_attach()
214 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); in rt2661_attach()
215 mbufq_init(&sc->sc_snd, ifqmaxlen); in rt2661_attach()
[all …]
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| /freebsd/sys/dev/ath/ath_hal/ar5416/ |
| H A D | ar5416_reset.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
33 (AH_PRIVATE(_ah)->ah_eeversion & AR5416_EEP_VER_MINOR_MASK)
37 /* Additional Time delay to wait after activiting the Base band */
70 * vectors (as determined by the mode), and station configuration
97 /* Bring out of sleep mode */ in ar5416Reset()
117 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid operating mode %u\n", in ar5416Reset()
122 HALASSERT(AH_PRIVATE(ah)->ah_eeversion >= AR_EEPROM_VER14_1); in ar5416Reset()
[all …]
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| /freebsd/sys/dev/iwn/ |
| H A D | if_iwn.c | 1 /*-
2 * Copyright (c) 2007-2009 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2013 Cedric GROSS <c.gross@kreiz-it.fr>
52 #include <machine/clock.h>
84 { 0x8086, IWN_DID_6x05_1, "Intel Centrino Advanced-N 6205" },
85 { 0x8086, IWN_DID_1000_1, "Intel Centrino Wireless-N 1000" },
86 { 0x8086, IWN_DID_1000_2, "Intel Centrino Wireless-N 1000" },
87 { 0x8086, IWN_DID_6x05_2, "Intel Centrino Advanced-N 6205" },
88 { 0x8086, IWN_DID_6050_1, "Intel Centrino Advanced-N + WiMAX 6250" },
89 { 0x8086, IWN_DID_6050_2, "Intel Centrino Advanced-N + WiMAX 6250" },
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| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_reset.c | 1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2008 Atheros Communications, Inc.
31 /* Additional Time delay to wait after activiting the Base band */
78 #define V(r, c) (ia)->data[((r)*(ia)->cols) + (c)] in write_common()
82 for (r = 0; r < ia->rows; r++) { in write_common()
111 * vectors (as determined by the mode), and station configuration
141 HALASSERT(ah->ah_magic == AR5212_MAGIC); in ar5212Reset()
142 ee = AH_PRIVATE(ah)->ah_eeprom; in ar5212Reset()
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| /freebsd/sys/dev/iwm/ |
| H A D | if_iwmreg.h | 10 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
73 * BEGIN iwl-csr.h
81 * low power states due to driver-invoked device resets
82 * (e.g. IWM_CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
95 #define IWM_CSR_INT_COALESCING (0x004) /* accum ints, 32-usec units */
97 #define IWM_CSR_INT_MASK (0x00c) /* host interrupt enable */
100 #define IWM_CSR_RESET (0x020) /* busmaster enable, NM
3088 uint8_t band; global() member
3105 uint8_t band; global() member
5336 uint8_t enable; global() member
5605 uint8_t band; global() member
6617 uint32_t mode; global() member
[all...] |
| /freebsd/share/dict/ |
| H A D | web2a | 12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
[all …]
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| /freebsd/sys/dev/sym/ |
| H A D | sym_hipd.c | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
5 * PCI-SCSI controllers.
7 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
9 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
11 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
14 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
15 * Copyright (C) 1998-1999 Gerard Roudier
18 * a port of the FreeBSD ncr driver to Linux-1.2.13.
22 * Stefan Esser <se@mi.Uni-Koeln.de>
[all …]
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| /freebsd/contrib/unbound/doc/ |
| H A D | Changelog | 2 - Merge #1265: Fix WSAPoll.
5 - Fix for print of connection type in log-replies for dot and doh.
8 - Fix to detect if atomic_store links in configure.
9 - Fix #1264: unbound 1.22.0 leaks memory when doing DoH.
12 - Tag for 1.23.0rc1.
13 - Fix fast_reload to print chroot with config file name.
16 - Merge #902: DNS Error Reporting (RFC 9567). Introduces new
17 configuration option 'dns-error-reportin
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