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/linux/drivers/clk/ti/
H A Dautoidle.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TI clock autoidle support
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
21 u8 shift; member
32 * we have some non-atomic read/write
34 * take one lock for handling autoidle
41 if (clk->ops && clk->ops->deny_idle) { in _omap2_clk_deny_idle()
45 clk->autoidle_count++; in _omap2_clk_deny_idle()
46 if (clk->autoidle_count == 1) in _omap2_clk_deny_idle()
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H A Ddpll3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP3/4 - specific DPLL control functions
5 * Copyright (C) 2009-2010 Texas Instruments, Inc.
6 * Copyright (C) 2009-2010 Nokia Corporation
46 /* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */
52 dd = clk->dpll_data; in _omap3_dpll_write_clken()
54 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in _omap3_dpll_write_clken()
55 v &= ~dd->enable_mask; in _omap3_dpll_write_clken()
56 v |= clken_bits << __ffs(dd->enable_mask); in _omap3_dpll_write_clken()
57 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in _omap3_dpll_write_clken()
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/linux/Documentation/devicetree/bindings/clock/ti/
H A Dautoidle.txt1 Binding for Texas Instruments autoidle clock.
5 and a configuration bit setting. Autoidle clock is never an individual
7 or fixed-factor.
9 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
12 - reg : offset for the register controlling the autoidle
13 - ti,autoidle-shift : bit shift of the autoidle enable bit
14 - ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0
18 #clock-cells = <0>;
19 compatible = "ti,divider-clock";
21 ti,max-div = <31>;
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H A Dfixed-factor-clock.txt3 This binding uses the common clock binding[1], and also uses the autoidle
4 support from TI autoidle clock [2].
6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 [2] Documentation/devicetree/bindings/clock/ti/autoidle.txt
10 - compatible : shall be "ti,fixed-factor-clock".
11 - #clock-cells : from common clock binding; shall be set to 0.
12 - ti,clock-div: fixed divider.
13 - ti,clock-mult: fixed multiplier.
14 - clocks: parent clock.
17 - clock-output-names : from common clock binding.
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H A Dti,divider-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,divider-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock It assumes a register-mapped adjustable clock rate divider
25 ti,index-starts-at-one - valid divisor values start at 1, not the default
32 ti,index-power-of-two - valid divisor values are powers of two. E.g:
49 Any zero value in this array means the corresponding bit-value is invalid
54 the number of bits to shift that mask, if necessary. If the shift value
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H A Dapll.txt4 register-mapped APLL with usually two selectable input clocks
11 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - compatible : shall be "ti,dra7-apll-clock" or "ti,omap2-apll-clock"
16 - #clock-cells : from common clock binding; shall be set to 0.
17 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
18 - reg : address and length of the register set for controlling the APLL.
20 "control" - contains the control register offset
21 "idlest" - contains the idlest register offset
22 "autoidle" - contains the autoidle register offset (OMAP2 only)
23 - ti,clock-frequency : static clock frequency for the clock (OMAP2 only)
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H A Dti,interface-clock.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/ti/ti,interface-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tero Kristo <kristo@kernel.org>
13 This clock is quite much similar to the basic gate-clock[1], however,
16 clock) and hardware autoidle enable / disable.
18 [1] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml
23 - ti,omap3-interface-clock # basic OMAP3 interface clock
24 - ti,omap3-no-wait-interface-clock # interface clock which has no hardware
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap44xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-output-names = "extalt_clkin_ck";
12 clock-frequency = <59000000>;
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
18 clock-output-names = "pad_clks_src_ck";
19 clock-frequency = <12000000>;
23 #clock-cells = <0>;
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H A Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 sys_clkin_ck: clock-sys-clkin-31@40 {
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
11 clock-output-names = "sys_clkin_ck";
13 ti,bit-shift = <31>;
17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 {
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
20 clock-output-names = "crystal_freq_sel_ck";
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H A Domap24xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "ti,composite-mux-clock";
12 ti,bit-shift = <2>;
17 #clock-cells = <0>;
18 compatible = "ti,composite-clock";
23 #clock-cells = <0>;
24 compatible = "ti,composite-mux-clock";
26 ti,bit-shift = <6>;
31 #clock-cells = <0>;
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/linux/arch/arm/mach-omap2/
H A Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
155 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
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H A Dsleep24xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mach-omap2/sleep.S
7 * Richard Woodruff <r-woodruff2@ti.com>
26 * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing
31 * R0 : DLL ctrl value pre-Sleep
35 * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on
40 * For less than 242x-ES2.2 upon wake from a sleep mode where the external
41 * oscillator was stopped, a timing bug exists where a non-stabilized 12MHz
44 * Post sleep we will shift back to using the DPLL. Apparently,
53 stmfd sp!, {r0 - r12, lr} @ save registers on stack
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H A Dcm2xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2008-2010, 2012 Texas Instruments, Inc.
21 #include "cm-regbits-24xx.h"
75 * DPLL autoidle control
99 * omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
115 idlest_offs = idlest_reg->offset & 0xff; in omap2xxx_cm_split_idlest_reg()
124 return -EINVAL; in omap2xxx_cm_split_idlest_reg()
126 offs = idlest_reg->offset; in omap2xxx_cm_split_idlest_reg()
138 * omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
142 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
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/linux/include/linux/platform_data/
H A Dti-sysc.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
35 * @autoidle_shift: Offset of the autoidle bit
39 * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
87 * struct sysc_capabilities - capabilities for an interconnect target module
101 * struct sysc_config - configuration for an interconnect target module
126 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
136 * based on device tree data parsed by ti-sysc driver.
/linux/drivers/media/platform/ti/omap3isp/
H A Disp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - Core
7 * Copyright (C) 2006-2010 Nokia Corporation
8 * Copyright (C) 2007-2009 Texas Instruments, Inc.
17 * Stanimir Varbanov <svarbanov@mm-sol.com>
22 * Ivan T. Ivanov <iivanov@mm-sol.com>
23 * RaniSuneela <r-m@ti.com>
24 * Atanas Filipov <afilipov@mm-sol.com>
25 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
27 * Nayden Kanchev <nkanchev@mm-sol.com>
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H A Disp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * TI OMAP3 ISP - Core
7 * Copyright (C) 2009-2010 Nokia Corporation
17 #include <media/media-entity.h>
18 #include <media/v4l2-async.h>
19 #include <media/v4l2-device.h>
20 #include <linux/clk-provider.h>
43 (to_isp_device(ptr_module)->dev)
98 * struct isp_res_mapping - Map ISP io resources to ISP revision.
100 * @offset: register offsets of various ISP sub-blocks
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H A Dispccp2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CCP2 module
55 #define BIT_SET(var, shift, mask, val) \ argument
57 var = ((var) & ~((mask) << (shift))) \
58 | ((val) << (shift)); \
62 * ccp2_print_status - Print current CCP2 module register values.
65 dev_dbg(isp->dev, "###CCP2 " #name "=0x%08x\n", \
72 dev_dbg(isp->dev, "-------------CCP2 Register dump-------------\n"); in ccp2_print_status()
103 dev_dbg(isp->dev, "--------------------------------------------\n"); in ccp2_print_status()
107 * ccp2_reset - Reset the CCP2
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