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/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Datmel,at91-usart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
11 - Richard Genoud <richard.genoud@gmail.com>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d3_uart.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_uart.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
24 pinctrl_uart0: uart0-0 {
32 pinctrl_uart1: uart1-0 {
41 compatible = "atmel,at91sam9260-usart";
43 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
[all …]
H A Dat91sam9x5_usart3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
4 * 4 USART.
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/mfd/at91-usart.h>
22 pinctrl_usart3: usart3-0 {
28 pinctrl_usart3_rts: usart3_rts-0 {
33 pinctrl_usart3_cts: usart3_cts-0 {
38 pinctrl_usart3_sck: usart3_sck-0 {
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H A Dat91-gatwick.dts1 // SPDX-License-Identifier: GPL-2.0
3 * at91-gatwick.dts - Device Tree file for the Gatwick board
8 /dts-v1/;
9 #include "at91-wb50n.dtsi"
10 #include <dt-bindings/input/input.h>
13 model = "Laird Workgroup Bridge 50N - Project Gatwick";
16 gpio-keys {
17 compatible = "gpio-keys";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_key_gpio>;
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H A Dat91sam9n12.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
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H A Dat91sam9261.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controlle
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H A Dat91rm9200.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controlle
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H A Dat91sam9260.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
10 #include <dt-bindings/pinctrl/at91
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H A Dat91sam9x5.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91
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H A Dsama5d2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91
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H A Dat91sam9rl.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-binding
[all...]
H A Dsam9x60.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
H A Dat91sam9g45.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91
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H A Dsama5d3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91
[all...]
H A Dat91sam9263.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-binding
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H A Dsama5d4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/mfd/at91
[all...]
H A Dlan966x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.h>
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
H A Dat91-ariag25.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-ariag25.dts - Device Tree file for Acme Systems Aria G25 (AT91SAM9G25 based)
8 /dts-v1/;
32 clock-frequency = <32768>;
36 clock-frequency = <12000000>;
41 compatible = "gpio-leds";
47 linux,default-trigger = "heartbeat";
53 compatible = "w1-gpio";
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_w1_0>;
[all …]
H A Dat91-sam9x60_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sam9x60_curiosity.dts - Device Tree file for Microchip SAM9X60 Curiosity board
9 /dts-v1/;
11 #include <dt-bindings/input/input.h>
15 compatible = "microchip,sam9x60-curiosity", "microchip,sam9x60", "atmel,at91sam9";
24 stdout-pat
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Datmel-usart.txt1 * Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
3 Required properties for USART:
4 - compatible: Should be one of the following:
5 - "atmel,at91rm9200-usart"
6 - "atmel,at91sam9260-usart"
7 - "microchip,sam9x60-usart"
8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
11 - reg: Should contain registers location and length
[all …]
H A Datmel-flexcom.txt4 controller and an USART. Only one function can be used at a time and is chosen
8 - compatible: Should be "atmel,sama5d2-flexcom"
9 or "microchip,sam9x7-flexcom", "atmel,sama5d2-flexcom"
10 - reg: Should be the offset/length value for Flexcom dedicated
11 I/O registers (without USART, TWI or SPI registers).
12 - clocks: Should be the Flexcom peripheral clock from PMC.
13 - #address-cell
[all...]
/freebsd/sys/contrib/device-tree/include/dt-bindings/mfd/
H A Dat91-usart.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides macros for AT91 USART DT bindings.
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Datmel,at91-pinctrl.txt1 * Atmel AT91 Pinmux Controller
3 The AT91 Pinmux Controller, enables the IC
10 Please refer to pinctrl-bindings.txt in this directory for details of the
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
45 From the datasheet Table 10-2.
83 - atmel,pins: 4 integers array, represents a group of pins mux and config
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