Lines Matching +full:at91 +full:- +full:usart

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
73 compatible = "mmio-sram";
75 #address-cells = <1>;
76 #size-cells = <1>;
81 compatible = "simple-bus";
82 #address-cells = <1>;
83 #size-cells = <1>;
87 compatible = "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
92 aic: interrupt-controller@fffff000 {
93 #interrupt-cells = <3>;
94 compatible = "atmel,at91rm9200-aic";
95 interrupt-controller;
97 atmel,external-irqs = <25 26 27 28 29 30 31>;
101 compatible = "atmel,at91rm9200-sdramc", "syscon";
105 pmc: clock-controller@fffffc00 {
106 compatible = "atmel,at91rm9200-pmc", "syscon";
109 #clock-cells = <2>;
111 clock-names = "slow_xtal", "main_xtal";
115 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
121 compatible = "atmel,at91rm9200-wdt";
126 compatible = "atmel,at91rm9200-rtc";
134 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
135 #address-cells = <1>;
136 #size-cells = <0>;
142 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
146 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
147 #address-cells = <1>;
148 #size-cells = <0>;
154 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
158 compatible = "atmel,at91rm9200-i2c";
161 pinctrl-names = "default";
162 pinctrl-0 = <&pinctrl_twi>;
164 #address-cells = <1>;
165 #size-cells = <0>;
174 clock-names = "mci_clk";
175 #address-cells = <1>;
176 #size-cells = <0>;
181 compatible = "atmel,at91rm9200-ssc";
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
187 clock-names = "pclk";
192 compatible = "atmel,at91rm9200-ssc";
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
198 clock-names = "pclk";
203 compatible = "atmel,at91rm9200-ssc";
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
209 clock-names = "pclk";
214 compatible = "cdns,at91rm9200-emac", "cdns,emac";
217 phy-mode = "rmii";
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_macb_rmii>;
221 clock-names = "ether_clk";
226 #address-cells = <1>;
227 #size-cells = <1>;
228 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
231 atmel,mux-mask = <
241 pinctrl_dbgu: dbgu-0 {
249 pinctrl_uart0: uart0-0 {
255 pinctrl_uart0_cts: uart0_cts-0 {
260 pinctrl_uart0_rts: uart0_rts-0 {
267 pinctrl_uart1: uart1-0 {
273 pinctrl_uart1_rts: uart1_rts-0 {
278 pinctrl_uart1_cts: uart1_cts-0 {
283 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
289 pinctrl_uart1_dcd: uart1_dcd-0 {
294 pinctrl_uart1_ri: uart1_ri-0 {
301 pinctrl_uart2: uart2-0 {
307 pinctrl_uart2_rts: uart2_rts-0 {
312 pinctrl_uart2_cts: uart2_cts-0 {
319 pinctrl_uart3: uart3-0 {
325 pinctrl_uart3_rts: uart3_rts-0 {
330 pinctrl_uart3_cts: uart3_cts-0 {
337 pinctrl_nand: nand-0 {
345 pinctrl_macb_rmii: macb_rmii-0 {
359 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
373 pinctrl_mmc0_clk: mmc0_clk-0 {
378 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
384 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
391 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
397 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
406 pinctrl_ssc0_tx: ssc0_tx-0 {
413 pinctrl_ssc0_rx: ssc0_rx-0 {
422 pinctrl_ssc1_tx: ssc1_tx-0 {
429 pinctrl_ssc1_rx: ssc1_rx-0 {
438 pinctrl_ssc2_tx: ssc2_tx-0 {
445 pinctrl_ssc2_rx: ssc2_rx-0 {
454 pinctrl_twi: twi-0 {
460 pinctrl_twi_gpio: twi_gpio-0 {
468 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
472 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
476 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
480 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
484 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
488 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
492 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
496 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
500 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
506 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
510 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
514 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
518 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
522 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
526 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
530 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
534 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
538 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
544 pinctrl_spi0: spi0-0 {
553 compatible = "atmel,at91rm9200-gpio";
556 #gpio-cells = <2>;
557 gpio-controller;
558 interrupt-controller;
559 #interrupt-cells = <2>;
564 compatible = "atmel,at91rm9200-gpio";
567 #gpio-cells = <2>;
568 gpio-controller;
569 interrupt-controller;
570 #interrupt-cells = <2>;
575 compatible = "atmel,at91rm9200-gpio";
578 #gpio-cells = <2>;
579 gpio-controller;
580 interrupt-controller;
581 #interrupt-cells = <2>;
586 compatible = "atmel,at91rm9200-gpio";
589 #gpio-cells = <2>;
590 gpio-controller;
591 interrupt-controller;
592 #interrupt-cells = <2>;
598 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
600 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_dbgu>;
605 clock-names = "usart";
610 compatible = "atmel,at91rm9200-usart";
612 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
614 atmel,use-dma-rx;
615 atmel,use-dma-tx;
616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_uart0>;
619 clock-names = "usart";
624 compatible = "atmel,at91rm9200-usart";
626 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
628 atmel,use-dma-rx;
629 atmel,use-dma-tx;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_uart1>;
633 clock-names = "usart";
638 compatible = "atmel,at91rm9200-usart";
640 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
642 atmel,use-dma-rx;
643 atmel,use-dma-tx;
644 pinctrl-names = "default";
645 pinctrl-0 = <&pinctrl_uart2>;
647 clock-names = "usart";
652 compatible = "atmel,at91rm9200-usart";
654 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
656 atmel,use-dma-rx;
657 atmel,use-dma-tx;
658 pinctrl-names = "default";
659 pinctrl-0 = <&pinctrl_uart3>;
661 clock-names = "usart";
666 compatible = "atmel,at91rm9200-udc";
670 clock-names = "pclk", "hclk";
675 #address-cells = <1>;
676 #size-cells = <0>;
677 compatible = "atmel,at91rm9200-spi";
680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_spi0>;
683 clock-names = "spi_clk";
689 compatible = "atmel,at91rm9200-nand";
690 #address-cells = <1>;
691 #size-cells = <1>;
693 atmel,nand-addr-offset = <21>;
694 atmel,nand-cmd-offset = <22>;
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_nand>;
697 nand-ecc-mode = "soft";
706 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
710 clock-names = "ohci_clk", "hclk", "uhpck";
715 i2c-gpio-0 {
716 compatible = "i2c-gpio";
720 i2c-gpio,sda-open-drain;
721 i2c-gpio,scl-open-drain;
722 i2c-gpio,delay-us = <2>; /* ~100 kHz */
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_twi_gpio>;
725 #address-cells = <1>;
726 #size-cells = <0>;