Lines Matching +full:at91 +full:- +full:usart
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,arm926ej-s";
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
72 compatible = "fixed-clock";
73 #clock-cells = <0>;
74 clock-frequency = <1000000>;
79 compatible = "mmio-sram";
81 #address-cells = <1>;
82 #size-cells = <1>;
87 compatible = "simple-bus";
88 #address-cells = <1>;
89 #size-cells = <1>;
93 compatible = "simple-bus";
94 #address-cells = <1>;
95 #size-cells = <1>;
98 aic: interrupt-controller@fffff000 {
99 #interrupt-cells = <3>;
100 compatible = "atmel,at91rm9200-aic";
101 interrupt-controller;
103 atmel,external-irqs = <31>;
107 compatible = "atmel,at91sam9x5-matrix", "syscon";
111 pmecc: ecc-engine@ffffe000 {
112 compatible = "atmel,at91sam9g45-pmecc";
118 compatible = "atmel,at91sam9g45-ddramc";
121 clock-names = "ddrck";
125 compatible = "atmel,at91sam9260-smc", "syscon";
129 pmc: clock-controller@fffffc00 {
130 compatible = "atmel,at91sam9x5-pmc", "syscon";
133 #clock-cells = <2>;
135 clock-names = "slow_clk", "main_xtal";
138 reset_controller: reset-controller@fffffe00 {
139 compatible = "atmel,at91sam9g45-rstc";
145 compatible = "atmel,at91sam9x5-shdwc";
151 compatible = "atmel,at91sam9260-pit";
157 clk32k: clock-controller@fffffe50 {
158 compatible = "atmel,at91sam9x5-sckc";
161 #clock-cells = <0>;
165 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
166 #address-cells = <1>;
167 #size-cells = <0>;
171 clock-names = "t0_clk", "slow_clk";
175 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
176 #address-cells = <1>;
177 #size-cells = <0>;
181 clock-names = "t0_clk", "slow_clk";
184 dma0: dma-controller@ffffec00 {
185 compatible = "atmel,at91sam9g45-dma";
188 #dma-cells = <2>;
190 clock-names = "dma_clk";
193 dma1: dma-controller@ffffee00 {
194 compatible = "atmel,at91sam9g45-dma";
197 #dma-cells = <2>;
199 clock-names = "dma_clk";
203 #address-cells = <1>;
204 #size-cells = <1>;
205 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
210 pinctrl_dbgu: dbgu-0 {
218 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
230 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
242 pinctrl_ebi_addr_nand: ebi-addr-0 {
250 pinctrl_usart0: usart0-0 {
256 pinctrl_usart0_rts: usart0_rts-0 {
261 pinctrl_usart0_cts: usart0_cts-0 {
266 pinctrl_usart0_sck: usart0_sck-0 {
273 pinctrl_usart1: usart1-0 {
279 pinctrl_usart1_rts: usart1_rts-0 {
284 pinctrl_usart1_cts: usart1_cts-0 {
289 pinctrl_usart1_sck: usart1_sck-0 {
296 pinctrl_usart2: usart2-0 {
302 pinctrl_usart2_rts: usart2_rts-0 {
307 pinctrl_usart2_cts: usart2_cts-0 {
312 pinctrl_usart2_sck: usart2_sck-0 {
319 pinctrl_uart0: uart0-0 {
327 pinctrl_uart1: uart1-0 {
335 pinctrl_nand_oe_we: nand-oe-we-0 {
341 pinctrl_nand_rb: nand-rb-0 {
346 pinctrl_nand_cs: nand-cs-0 {
353 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
360 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
369 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
376 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
385 pinctrl_ssc0_tx: ssc0_tx-0 {
392 pinctrl_ssc0_rx: ssc0_rx-0 {
401 pinctrl_spi0: spi0-0 {
410 pinctrl_spi1: spi1-0 {
419 pinctrl_i2c0: i2c0-0 {
427 pinctrl_i2c1: i2c1-0 {
435 pinctrl_i2c2: i2c2-0 {
443 pinctrl_i2c_gpio0: i2c_gpio0-0 {
451 pinctrl_i2c_gpio1: i2c_gpio1-0 {
459 pinctrl_i2c_gpio2: i2c_gpio2-0 {
467 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
471 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
475 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
480 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
484 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
488 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
493 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
497 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
502 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
506 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
513 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
517 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
521 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
525 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
529 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
533 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
537 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
541 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
545 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
551 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
555 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
559 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
563 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
567 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
571 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
575 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
579 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
583 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
589 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
592 #gpio-cells = <2>;
593 gpio-controller;
594 interrupt-controller;
595 #interrupt-cells = <2>;
600 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
603 #gpio-cells = <2>;
604 gpio-controller;
605 #gpio-lines = <19>;
606 interrupt-controller;
607 #interrupt-cells = <2>;
612 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
615 #gpio-cells = <2>;
616 gpio-controller;
617 interrupt-controller;
618 #interrupt-cells = <2>;
623 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
626 #gpio-cells = <2>;
627 gpio-controller;
628 #gpio-lines = <22>;
629 interrupt-controller;
630 #interrupt-cells = <2>;
636 compatible = "atmel,at91sam9g45-ssc";
641 dma-names = "tx", "rx";
642 pinctrl-names = "default";
643 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
645 clock-names = "pclk";
654 dma-names = "rxtx";
656 clock-names = "mci_clk";
657 #address-cells = <1>;
658 #size-cells = <0>;
667 dma-names = "rxtx";
669 clock-names = "mci_clk";
670 #address-cells = <1>;
671 #size-cells = <0>;
676 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
678 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
680 pinctrl-names = "default";
681 pinctrl-0 = <&pinctrl_dbgu>;
684 dma-names = "tx", "rx";
686 clock-names = "usart";
691 compatible = "atmel,at91sam9260-usart";
693 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_usart0>;
699 dma-names = "tx", "rx";
701 clock-names = "usart";
706 compatible = "atmel,at91sam9260-usart";
708 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
710 pinctrl-names = "default";
711 pinctrl-0 = <&pinctrl_usart1>;
714 dma-names = "tx", "rx";
716 clock-names = "usart";
721 compatible = "atmel,at91sam9260-usart";
723 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
725 pinctrl-names = "default";
726 pinctrl-0 = <&pinctrl_usart2>;
729 dma-names = "tx", "rx";
731 clock-names = "usart";
736 compatible = "atmel,at91sam9x5-i2c";
741 dma-names = "tx", "rx";
742 #address-cells = <1>;
743 #size-cells = <0>;
744 pinctrl-names = "default";
745 pinctrl-0 = <&pinctrl_i2c0>;
751 compatible = "atmel,at91sam9x5-i2c";
756 dma-names = "tx", "rx";
757 #address-cells = <1>;
758 #size-cells = <0>;
759 pinctrl-names = "default";
760 pinctrl-0 = <&pinctrl_i2c1>;
766 compatible = "atmel,at91sam9x5-i2c";
771 dma-names = "tx", "rx";
772 #address-cells = <1>;
773 #size-cells = <0>;
774 pinctrl-names = "default";
775 pinctrl-0 = <&pinctrl_i2c2>;
781 compatible = "atmel,at91sam9260-usart";
783 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
785 pinctrl-names = "default";
786 pinctrl-0 = <&pinctrl_uart0>;
788 clock-names = "usart";
793 compatible = "atmel,at91sam9260-usart";
795 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
797 pinctrl-names = "default";
798 pinctrl-0 = <&pinctrl_uart1>;
800 clock-names = "usart";
805 compatible = "atmel,at91sam9x5-adc";
810 clock-names = "adc_clk", "adc_op_clk";
811 atmel,adc-use-external-triggers;
812 atmel,adc-channels-used = <0xffff>;
813 atmel,adc-vref = <3300>;
814 atmel,adc-startup-time = <40>;
815 atmel,adc-sample-hold-time = <11>;
819 #address-cells = <1>;
820 #size-cells = <0>;
821 compatible = "atmel,at91rm9200-spi";
826 dma-names = "tx", "rx";
827 pinctrl-names = "default";
828 pinctrl-0 = <&pinctrl_spi0>;
830 clock-names = "spi_clk";
835 #address-cells = <1>;
836 #size-cells = <0>;
837 compatible = "atmel,at91rm9200-spi";
842 dma-names = "tx", "rx";
843 pinctrl-names = "default";
844 pinctrl-0 = <&pinctrl_spi1>;
846 clock-names = "spi_clk";
851 compatible = "atmel,at91sam9g45-udc";
856 clock-names = "hclk", "pclk";
861 compatible = "atmel,at91sam9260-wdt";
865 atmel,watchdog-type = "hardware";
866 atmel,reset-type = "all";
867 atmel,dbg-halt;
872 compatible = "atmel,at91sam9x5-rtc";
880 compatible = "atmel,at91sam9rl-pwm";
884 #pwm-cells = <3>;
890 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
894 clock-names = "ohci_clk", "hclk", "uhpck";
899 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
903 clock-names = "usb_clk", "ehci_clk";
908 compatible = "atmel,at91sam9x5-ebi";
909 #address-cells = <2>;
910 #size-cells = <1>;
923 nand_controller: nand-controller {
924 compatible = "atmel,at91sam9g45-nand-controller";
925 ecc-engine = <&pmecc>;
926 #address-cells = <2>;
927 #size-cells = <1>;
934 i2c-gpio-0 {
935 compatible = "i2c-gpio";
939 i2c-gpio,sda-open-drain;
940 i2c-gpio,scl-open-drain;
941 i2c-gpio,delay-us = <2>; /* ~100 kHz */
942 #address-cells = <1>;
943 #size-cells = <0>;
944 pinctrl-names = "default";
945 pinctrl-0 = <&pinctrl_i2c_gpio0>;
949 i2c-gpio-1 {
950 compatible = "i2c-gpio";
954 i2c-gpio,sda-open-drain;
955 i2c-gpio,scl-open-drain;
956 i2c-gpio,delay-us = <2>; /* ~100 kHz */
957 #address-cells = <1>;
958 #size-cells = <0>;
959 pinctrl-names = "default";
960 pinctrl-0 = <&pinctrl_i2c_gpio1>;
964 i2c-gpio-2 {
965 compatible = "i2c-gpio";
969 i2c-gpio,sda-open-drain;
970 i2c-gpio,scl-open-drain;
971 i2c-gpio,delay-us = <2>; /* ~100 kHz */
972 #address-cells = <1>;
973 #size-cells = <0>;
974 pinctrl-names = "default";
975 pinctrl-0 = <&pinctrl_i2c_gpio2>;