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/linux/Documentation/devicetree/bindings/gpio/
H A Daspeed,sgpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
16 GPIO pins can be programmed to support the following options
17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, edge-high, edge-low)
[all …]
/linux/Documentation/devicetree/bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
[all …]
/linux/drivers/fsi/
H A Dfsi-master-ast-cf.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/gpio/consumer.h>
21 #include <linux/gpio/aspeed.h>
25 #include "fsi-master.h"
26 #include "cf-fsi-fw.h"
28 #define FW_FILE_NAME "cf-fsi-fw.bin"
35 /* AST2500 specific ones */
132 msg->msg <<= bits; in msg_push_bits()
133 msg->msg |= data & ((1ull << bits) - 1); in msg_push_bits()
134 msg->bits += bits; in msg_push_bits()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 FSI - the FRU Support Interface - is a simple bus for low-level
12 access to POWER-based hardware.
29 symlinks in /dev/fsi/by-path when this option is enabled.
32 tristate "GPIO-based FSI master"
36 This option enables a FSI master driver using GPIO lines.
52 This option enables a FSI master using the AST2400 and AST2500 GPIO
84 a pipe-like FSI device for communicating with the self boot engine
91 This option enables an SBEFIFO based On-Chip Controller (OCC) device
H A Dfsi-master-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * A FSI master controller, using a simple GPIO bit-banging interface
10 #include <linux/gpio/consumer.h>
18 #include "fsi-master.h"
54 if (!master->no_delays) in clock_toggle()
56 gpiod_set_value(master->gpio_clk, 0); in clock_toggle()
57 if (!master->no_delays) in clock_toggle()
59 gpiod_set_value(master->gpio_clk, 1); in clock_toggle()
67 if (!master->no_delays) in sda_clock_in()
69 gpiod_set_value(master->gpio_clk, 0); in sda_clock_in()
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-portwell-neptune.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "portwell,neptune-bmc", "aspeed,ast2500";
16 stdout-path = &uart5;
25 compatible = "gpio-leds";
28 gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
29 default-state = "on";
33 gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
[all …]
H A Daspeed-bmc-inspur-on5263m5.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
10 compatible = "inspur,on5263m5-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
[all …]
H A Daspeed-bmc-supermicro-x11spi.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
10 compatible = "supermicro,x11spi-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 no-map;
32 iio-hwmon {
[all …]
H A Daspeed-bmc-vegman-sx20.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-sx20-bmc", "aspeed,ast2500";
12 &gpio {
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
[all …]
H A Daspeed-bmc-vegman-n110.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-bmc-vegman.dtsi"
9 compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500";
12 &gpio {
14 gpio-line-names =
15 …/*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","…
16 /*B0-B7*/ "","","","","","","","",
17 /*C0-C7*/ "","","","","","","","",
18 /*D0-D7*/ "","","","","","","","",
[all …]
H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
24 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
26 compatible = "shared-dma-pool";
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/leds/common.h>
12 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
22 stdout-path = &uart5;
30 compatible = "gpio-leds";
[all …]
H A Daspeed-bmc-lenovo-hr630.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2019-present Lenovo
8 /dts-v1/;
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
15 compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
29 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
[all …]
H A Daspeed-bmc-tyan-s8036.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Daspeed-bmc-inspur-nf5280m6.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
15 stdout-path = &uart5;
23 reserved-memory {
24 #address-cells = <1>;
[all …]
H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Daspeed-bmc-bytedance-g220a.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "bytedance,g220a-bmc", "aspeed,ast2500";
57 stdout-path = &uart5;
65 reserved-memory {
66 #address-cells = <1>;
[all …]
H A Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
[all …]
/linux/drivers/gpio/
H A Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/gpio/driver.h>
50 * Note: The "value" register returns the input value when the GPIO is
53 * The "rdata" register returns the output value when the GPIO is
105 static void __iomem *bank_reg(struct aspeed_sgpio *gpio, in bank_reg() argument
111 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
113 return gpio->base + bank->rdata_reg; in bank_reg()
115 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
117 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
119 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
10 bool "GPIO Support"
12 This enables GPIO support through the generic GPIO library.
14 one or more of the GPIO drivers below.
50 this symbol, but new drivers should use the generic gpio-regmap
54 bool "Debug GPIO calls"
57 Say Y here to add some extra checks and diagnostics to GPIO calls.
60 non-sleeping contexts. They can make bitbanged serial protocols
65 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
[all …]
H A Dgpio-aspeed.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/gpio/aspeed.h>
11 #include <linux/gpio/driver.h>
26 * These two headers aren't meant to be used by GPIO drivers. We need
31 #include <linux/gpio/consumer.h>
34 /* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */
35 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
36 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
76 * represents disabled debouncing for the GPIO. Any other value for an element
110 * line even when the GPIO is configured as an output. Since
[all …]
/linux/drivers/irqchip/
H A Dirq-aspeed-vic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2015 - Ben Herrenschmidt, IBM Corp.
7 * Based on irq-vic.c:
9 * Copyright (C) 1999 - 2003 ARM Limited
63 writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR); in vic_init_hw()
64 writel(0xffffffff, vic->base + AVIC_INT_ENABLE_CLR + 4); in vic_init_hw()
67 writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR); in vic_init_hw()
68 writel(0xffffffff, vic->base + AVIC_INT_TRIGGER_CLR + 4); in vic_init_hw()
71 writel(0, vic->base + AVIC_INT_SELECT); in vic_init_hw()
72 writel(0, vic->base + AVIC_INT_SELECT + 4); in vic_init_hw()
[all …]
/linux/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * The ASPEED SoCs provide typically more than 200 pins for GPIO and other
21 * read-only).
23 * SoC Multi-function Pin Expression Examples
24 * ------------------------------------------
26 * Here are some sample mux configurations from the AST2400 and AST2500
30 * D6 is a pin with a single function (beside GPIO); a high priority signal
34 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
36 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
38 * C5 is a multi-signal pin (high and low priority signals). Here we touch
[all …]
H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
[all …]

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