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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-nominal.dtsi7 assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
13 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
19 assigned-clock-rates = <0>, <0>,
28 assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;
29 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;
30 assigned-clock-rates = <800000000>;
34 assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,
36 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
38 assigned-clock-rates = <800000000>, <800000000>;
42 assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,
[all …]
H A Dimx8mm-overdrive.dtsi4 assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>,
6 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
7 assigned-clock-rates = <0>, <1000000000>;
11 assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>,
13 assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>;
14 assigned-clock-rates = <0>, <1000000000>;
18 assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>,
22 assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
25 assigned-clock-rates = <750000000>,
H A Dimx8-ss-dma.dtsi34 assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
35 assigned-clock-rates = <60000000>;
52 assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
53 assigned-clock-rates = <60000000>;
70 assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;
71 assigned-clock-rates = <60000000>;
88 assigned-clocks = <&clk IMX_SC_R_SPI_3 IMX_SC_PM_CLK_PER>;
89 assigned-clock-rates = <60000000>;
102 assigned-clocks = <&clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
103 assigned-clock-rates = <80000000>;
[all …]
H A Dimx8ulp.dtsi303 assigned-clocks = <&pcc3 IMX8ULP_CLK_WDOG3>;
304 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_SOSC_DIV2>;
370 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C4>;
371 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
372 assigned-clock-rates = <48000000>;
383 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPI2C5>;
384 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
385 assigned-clock-rates = <48000000>;
416 assigned-clocks = <&pcc3 IMX8ULP_CLK_LPSPI4>;
417 assigned-clock-parents = <&cgc1 IMX8ULP_CLK_FROSC_DIV2>;
[all …]
H A Dimx8mq-mnt-reform2.dts105 assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
106 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
107 assigned-clock-rates = <25000000>;
175 assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>;
176 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>;
177 /delete-property/assigned-clock-rates;
235 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
236 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
237 assigned-clock-rates = <25000000>;
274 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
[all …]
/linux/Documentation/process/
H A Dcve.rst8 regards to the kernel project, and CVE numbers were very often assigned
21 A list of all assigned CVEs for the Linux kernel can be found in the
24 assigned CVEs, please `subscribe
32 for CVE number assignments and have CVE numbers automatically assigned
45 should have a CVE assigned to it, please email them at <cve@kernel.org>
53 No CVEs will be automatically assigned for unfixed security issues in
57 have a CVE assigned before an issue is resolved with a commit, please
59 identifier assigned from their batch of reserved identifiers.
61 No CVEs will be assigned for any issue found in a version of the kernel
66 Disputes of assigned CVEs
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml95 assigned-clocks:
98 assigned-clock-parents:
104 - assigned-clocks
105 - assigned-clock-parents
131 assigned-clocks:
134 assigned-clock-parents:
140 - assigned-clocks
141 - assigned-clock-parents
210 assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>;
211 assigned-clock-parents = <&k3_clks 292 15>, <&k3_clks 292 4>;
[all …]
/linux/include/media/
H A Dv4l2-mem2mem.h154 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
164 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
188 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
207 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
237 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
250 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
267 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
279 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
295 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
308 * @m2m_ctx: m2m context assigned t
[all...]
/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml36 assigned-clocks:
40 assigned-clock-parents:
44 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
80 assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,
83 assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
84 assigned-clock-rates = <368640000>, <49152000>, <12288000>;
102 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
103 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
[all …]
H A Dnvidia,tegra210-ahub.yaml44 assigned-clocks:
47 assigned-clock-parents:
50 assigned-clock-rates:
123 - assigned-clocks
124 - assigned-clock-parents
140 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
141 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
177 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
178 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
179 assigned-clock-rates = <1536000>;
[all …]
H A Dbrcm,cygnus-audio.txt13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
H A Dnvidia,tegra210-dmic.yaml46 assigned-clocks:
49 assigned-clock-parents:
52 assigned-clock-rates:
80 - assigned-clocks
81 - assigned-clock-parents
94 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
95 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
96 assigned-clock-rates = <3072000>;
H A Dnvidia,tegra186-dspk.yaml46 assigned-clocks:
49 assigned-clock-parents:
52 assigned-clock-rates:
80 - assigned-clocks
81 - assigned-clock-parents
95 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
96 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
97 assigned-clock-rates = <12288000>;
H A Dnvidia,tegra210-i2s.yaml60 assigned-clocks:
64 assigned-clock-parents:
68 assigned-clock-rates:
97 - assigned-clocks
98 - assigned-clock-parents
111 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
112 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
113 assigned-clock-rates = <1536000>;
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
263 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
264 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
H A Dimx7d-zii-rpu2.dts189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
190 assigned-clock-rates = <884736000>;
211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
214 assigned-clock-rates = <0>, <100000000>;
294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
[all …]
H A Dimx7d-pico.dtsi105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
129 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
131 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
132 assigned-clock-rates = <0>, <100000000>;
286 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
288 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
289 assigned-clock-rates = <0>, <24576000>;
321 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
/linux/drivers/clk/
H A Dclk-conf.c21 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
28 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
50 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
63 pr_warn("clk: couldn't get assigned clock %d for %pOF\n", in __set_clk_parents()
90 count = of_property_count_u32_elems(node, "assigned-clock-rates"); in __set_clk_rates()
91 count_64 = of_property_count_u64_elems(node, "assigned-clock-rates-u64"); in __set_clk_rates()
99 "assigned-clock-rates-u64", in __set_clk_rates()
106 rc = of_property_read_u32_array(node, "assigned-clock-rates", in __set_clk_rates()
124 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
159 * of_clk_set_defaults() - parse and set assigned clocks configuration
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-odroid-common.dtsi129 assigned-clocks = <&clock CLK_FOUT_EPLL>;
130 assigned-clock-rates = <45158401>;
134 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
140 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
143 assigned-clock-rates = <0>, <0>,
211 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
213 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
214 assigned-clock-rates = <0>, <176000000>;
219 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
221 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-clk-ccf.dtsi170 assigned-clocks = <&zynqmp_clk GEM_TSU>;
177 assigned-clocks = <&zynqmp_clk GEM_TSU>;
184 assigned-clocks = <&zynqmp_clk GEM_TSU>;
191 assigned-clocks = <&zynqmp_clk GEM_TSU>;
220 assigned-clocks = <&zynqmp_clk SDIO0_REF>;
225 assigned-clocks = <&zynqmp_clk SDIO1_REF>;
254 assigned-clocks = <&zynqmp_clk UART0_REF>;
259 assigned-clocks = <&zynqmp_clk UART1_REF>;
264 assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
273 assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
[all …]
/linux/Documentation/arch/s390/
H A Dvfio-ap.rst10 The AP devices provide cryptographic functions to all CPUs assigned to a
27 functions. There can be from 0 to 256 adapters assigned to an LPAR. Adapters
28 assigned to the LPAR in which a linux host is running will be available to
34 The AP adapter cards are assigned to a given LPAR via the system's Activation
36 in the LPAR, the AP bus detects the AP adapter cards assigned to the LPAR and
37 creates a sysfs device for each assigned adapter. For example, if AP adapters
38 4 and 10 (0x0a) are assigned to the LPAR, the AP bus will create the following
68 The AP usage and control domains are assigned to a given LPAR via the system's
71 domains assigned to the LPAR. The domain number of each usage domain and
91 domains 6 and 71 (0x47) are assigned to the LPAR, the AP bus will create the
[all …]
/linux/arch/mips/boot/dts/img/
H A Dpistachio.dtsi51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
/linux/tools/perf/pmu-events/arch/x86/amdzen1/
H A Dfloating-point.json5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …ions it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to all pipes.",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 3.",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 2.",
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 1.",
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 0.",
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dnxp,imx8qxp-adc.yaml33 assigned-clocks:
36 assigned-clock-rates:
57 - assigned-clocks
58 - assigned-clock-rates
78 assigned-clocks = <&clk IMX_SC_R_ADC_0>;
79 assigned-clock-rates = <24000000>;
/linux/drivers/s390/char/
H A Dsclp_mem.c49 u16 assigned; member
129 for (i = 0; i < sccb->assigned; i++) { in sclp_attach_storage()
309 static void __init insert_increment(u16 rn, int standby, int assigned) in insert_increment() argument
323 if (assigned && incr->rn > rn) in insert_increment()
325 if (!assigned && incr->rn - last_rn > 1) in insert_increment()
330 if (!assigned) in insert_increment()
342 int i, id, assigned, rc; in sclp_detect_standby_memory() local
353 assigned = 0; in sclp_detect_standby_memory()
363 for (i = 0; i < sccb->assigned; i++) { in sclp_detect_standby_memory()
366 assigned++; in sclp_detect_standby_memory()
[all …]

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