1*36e5ecc2SSimran RaiBROADCOM Cygnus Audio I2S/TDM/SPDIF controller 2*36e5ecc2SSimran Rai 3*36e5ecc2SSimran RaiRequired properties: 4*36e5ecc2SSimran Rai - compatible : "brcm,cygnus-audio" 5*36e5ecc2SSimran Rai - #address-cells: 32bit valued, 1 cell. 6*36e5ecc2SSimran Rai - #size-cells: 32bit valued, 0 cell. 7*36e5ecc2SSimran Rai - reg : Should contain audio registers location and length 8*36e5ecc2SSimran Rai - reg-names: names of the registers listed in "reg" property 9*36e5ecc2SSimran Rai Valid names are "aud" and "i2s_in". "aud" contains a 10*36e5ecc2SSimran Rai set of DMA, I2S_OUT and SPDIF registers. "i2s_in" contains 11*36e5ecc2SSimran Rai a set of I2S_IN registers. 12*36e5ecc2SSimran Rai - clocks: PLL and leaf clocks used by audio ports 13*36e5ecc2SSimran Rai - assigned-clocks: PLL and leaf clocks 14*36e5ecc2SSimran Rai - assigned-clock-parents: parent clocks of the assigned clocks 15*36e5ecc2SSimran Rai (usually the PLL) 16*36e5ecc2SSimran Rai - assigned-clock-rates: List of clock frequencies of the 17*36e5ecc2SSimran Rai assigned clocks 18*36e5ecc2SSimran Rai - clock-names: names of 3 leaf clocks used by audio ports 19*36e5ecc2SSimran Rai Valid names are "ch0_audio", "ch1_audio", "ch2_audio" 20*36e5ecc2SSimran Rai - interrupts: audio DMA interrupt number 21*36e5ecc2SSimran Rai 22*36e5ecc2SSimran RaiSSP Subnode properties: 23*36e5ecc2SSimran Rai- reg: The index of ssp port interface to use 24*36e5ecc2SSimran Rai Valid value are 0, 1, 2, or 3 (for spdif) 25*36e5ecc2SSimran Rai 26*36e5ecc2SSimran RaiExample: 27*36e5ecc2SSimran Rai cygnus_audio: audio@180ae000 { 28*36e5ecc2SSimran Rai compatible = "brcm,cygnus-audio"; 29*36e5ecc2SSimran Rai #address-cells = <1>; 30*36e5ecc2SSimran Rai #size-cells = <0>; 31*36e5ecc2SSimran Rai reg = <0x180ae000 0xafd>, <0x180aec00 0x1f8>; 32*36e5ecc2SSimran Rai reg-names = "aud", "i2s_in"; 33*36e5ecc2SSimran Rai clocks = <&audiopll BCM_CYGNUS_AUDIOPLL_CH0>, 34*36e5ecc2SSimran Rai <&audiopll BCM_CYGNUS_AUDIOPLL_CH1>, 35*36e5ecc2SSimran Rai <&audiopll BCM_CYGNUS_AUDIOPLL_CH2>; 36*36e5ecc2SSimran Rai assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>, 37*36e5ecc2SSimran Rai <&audiopll BCM_CYGNUS_AUDIOPLL_CH0>, 38*36e5ecc2SSimran Rai <&audiopll BCM_CYGNUS_AUDIOPLL_CH1>, 39*36e5ecc2SSimran Rai <&audiopll BCM_CYGNUS_AUDIOPLL_CH2>; 40*36e5ecc2SSimran Rai assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>; 41*36e5ecc2SSimran Rai assigned-clock-rates = <1769470191>, 42*36e5ecc2SSimran Rai <0>, 43*36e5ecc2SSimran Rai <0>, 44*36e5ecc2SSimran Rai <0>; 45*36e5ecc2SSimran Rai clock-names = "ch0_audio", "ch1_audio", "ch2_audio"; 46*36e5ecc2SSimran Rai interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 47*36e5ecc2SSimran Rai 48*36e5ecc2SSimran Rai ssp0: ssp_port@0 { 49*36e5ecc2SSimran Rai reg = <0>; 50*36e5ecc2SSimran Rai }; 51*36e5ecc2SSimran Rai 52*36e5ecc2SSimran Rai ssp1: ssp_port@1 { 53*36e5ecc2SSimran Rai reg = <1>; 54*36e5ecc2SSimran Rai }; 55*36e5ecc2SSimran Rai 56*36e5ecc2SSimran Rai ssp2: ssp_port@2 { 57*36e5ecc2SSimran Rai reg = <2>; 58*36e5ecc2SSimran Rai }; 59*36e5ecc2SSimran Rai 60*36e5ecc2SSimran Rai spdif: spdif_port@3 { 61*36e5ecc2SSimran Rai reg = <3>; 62*36e5ecc2SSimran Rai }; 63*36e5ecc2SSimran Rai }; 64