| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | mvebu-pci.txt | 5 - compatible: one of the following values:
6 marvell,armada-370-pcie
7 marvell,armada-xp-pcie
8 marvell,dove-pcie
9 marvell,kirkwood-pcie
10 - #address-cells, set to <3>
11 - #size-cells, set to <2>
12 - #interrupt-cells, set to <1>
13 - bus-range: PCI bus numbers covered
14 - device_type, set to "pci"
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| H A D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
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| H A D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
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| H A D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
30 compatible = "arm,cortex-a9";
37 compatible = "marvell,armada-370-pcie";
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| H A D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
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| H A D | armada-380.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
25 compatible = "arm,cortex-a9";
31 internal-regs {
33 compatible = "marvell,mv88f6810-pinctrl";
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| H A D | kirkwood-6282.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "marvell,kirkwood-pcie";
9 #address-cells = <3>;
10 #size-cells = <2>;
12 bus-range = <0x00 0xff>;
25 assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
27 #address-cells = <3>;
28 #size-cells = <2>;
29 #interrupt-cells = <1>;
32 bus-range = <0x00 0xff>;
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| H A D | armada-39x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | cavium-mdio.txt | 4 - compatible: One of:
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
13 - #address-cells: Must be <1>.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
21 compatible = "cavium,octeon-3860-mdio";
22 #address-cells = <1>;
23 #size-cells = <0>;
26 ethernet-phy@0 {
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-intel-m10-bmc | 1 What: /sys/bus/.../drivers/intel-m10-bmc/.../bmc_version
9 What: /sys/bus/.../drivers/intel-m10-bmc/.../bmcfw_version
17 What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
22 of sequential MAC addresses assigned to the board
28 What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
33 addresses assigned to the board managed by the Intel
|
| /linux/Documentation/security/ |
| H A D | SCTP.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 --------------
26 Passes the ``@asoc`` and ``@chunk->skb`` of the association INIT packet to the
30 @asoc - pointer to sctp association structure.
31 @skb - pointer to skbuff of association packet.
36 Passes one or more ipv4/ipv6 addresses to the security module for validation
42 @sk - Pointer to sock structure.
43 @optname - Name of the option to validate.
44 @address - One or more ipv4 / ipv6 addresses.
45 @addrlen - The total length of address(s). This is calculated on each
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| /linux/include/linux/ |
| H A D | etherdevice.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
69 /* Reserved Ethernet Addresses per IEEE 802.1Q */
81 * is_link_local_ether_addr - Determine if given Ethernet address is link-local
82 * @addr: Pointer to a six-byte array containing the Ethernet address
104 * is_zero_ether_addr - Determine if give Ethernet address is all zeros.
105 * @addr: Pointer to a six-byte array containing the Ethernet address
123 * is_multicast_ether_addr - Determine if the Ethernet address is a multicast.
124 * @addr: Pointer to a six-byte array containing the Ethernet address
137 return 0x01 & (a >> ((sizeof(a) * 8) - 8)); in is_multicast_ether_addr()
157 * is_local_ether_addr - Determine if the Ethernet address is locally-assigned one (IEEE 802).
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| /linux/Documentation/arch/powerpc/ |
| H A D | pci_iov_resource_on_powernv.rst | 57 - For DMA we then provide an entire address space for each PE that can
63 - For MSIs, we have two windows in the address space (one at the top of
64 the 32-bit space and one much higher) which, via a combination of the
70 - Error messages just use the RTT.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
103 can be assigned to a PE.
110 - The M64 windows:
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| /linux/Documentation/arch/x86/ |
| H A D | sva.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 same virtual addresses avoiding the need for software to translate virtual
12 addresses to physical addresses. SVA is what PCIe calls Shared Virtual
15 In addition to the convenience of using application virtual addresses
19 application page-faults. For more information please refer to the PCIe
24 to cache translations for virtual addresses. The IOMMU driver uses the
34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits
40 ID (PASID), which is a 20-bit number defined by the PCIe SIG.
43 IOMMU to track I/O on a per-PASID granularity in addition to using the PCIe
52 performed, virtual addresses of all parameters, virtual address of a completion
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| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-atr.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-atr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
22 i2c-alias-pool:
23 $ref: /schemas/types.yaml#/definitions/uint32-array
25 I2C alias pool is a pool of I2C addresses on the main I2C bus that can be
27 addresses must be available, not used by any other peripheral. Each
28 remote peripheral is assigned an alias from the pool, and transactions to
|
| /linux/drivers/net/bonding/ |
| H A D | bond_alb.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved.
37 u8 padding[ETH_ZLEN - ETH_HLEN];
77 entry->load_history = 1 + entry->tx_bytes / in tlb_init_table_entry()
79 entry->tx_bytes = 0; in tlb_init_table_entry()
82 entry->tx_slave = NULL; in tlb_init_table_entry()
83 entry->next = TLB_NULL_INDEX; in tlb_init_table_entry()
84 entry->prev = TLB_NULL_INDEX; in tlb_init_table_entry()
119 spin_lock_bh(&bond->mode_lock); in tlb_clear_slave()
121 spin_unlock_bh(&bond->mode_lock); in tlb_clear_slave()
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| /linux/include/linux/mfd/ |
| H A D | altera-a10sr.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
19 /* Write registers are always on even addresses */
21 /* Odd registers are always on odd addresses */
28 * by 2 because the reads are at odd addresses.
39 #define ALTR_A10SR_LED_REG 0x02 /* LED - Upper 4 bits */
41 #define ALTR_A10SR_LED_VALID_SHIFT 4 /* LED - Upper 4 bits valid */
45 #define ALTR_A10SR_PBDSW_REG 0x04 /* PB & DIP SW - Input only */
65 * struct altr_a10sr - Altera Max5 MFD device private data structure
67 * @regmap: the regmap assigned to the parent device.
|
| /linux/net/netfilter/ipvs/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 IP Virtual Server support will let you build a high-performance
75 IP VS was compiled built-in.
116 tristate "round-robin scheduling"
118 The robin-robin scheduling algorithm simply directs network
119 connections to different real servers in a round-robin manner.
125 tristate "weighted round-robin scheduling"
127 The weighted robin-robin scheduling algorithm directs network
129 in a round-robin manner. Servers with higher weights receive
138 tristate "least-connection scheduling"
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| /linux/Documentation/usb/ |
| H A D | raw-gadget.rst | 5 USB Raw Gadget is a gadget driver that gives userspace low-level control over
37 4. Raw Gadget explicitly exposes information about endpoints addresses and
38 capabilities. This allows the user to write UDC-agnostic gadgets.
40 5. Raw Gadget has an ioctl-based interface instead of a filesystem-based
46 The user can interact with Raw Gadget by opening ``/dev/raw-gadget`` and
53 1. Create a Raw Gadget instance by opening ``/dev/raw-gadget``.
60 Note that some UDC drivers have fixed addresses assigned to endpoints, and
61 therefore arbitrary endpoint addresses cannot be used in the descriptors.
62 Nevertheless, Raw Gadget provides a UDC-agnostic way to write USB gadgets.
66 endpoints for the gadget and assign addresses in the endpoint descriptors
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| /linux/drivers/i2c/ |
| H A D | i2c-atr.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * Originally based on i2c-mux.c
12 #include <linux/i2c-atr.h>
21 #define ATR_MAX_SYMLINK_LEN 11 /* Longest name is 10 chars: "channel-99" */
24 * struct i2c_atr_alias_pair - Holds the alias assigned to a client.
27 * @alias: I2C alias address assigned by the driver.
38 * struct i2c_atr_chan - Data for a channel.
43 * assigned aliases
45 * @orig_addrs: Buffer used to store the original addresses during transmit
62 * struct i2c_atr - The I2C ATR instance
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| /linux/arch/x86/pci/ |
| H A D | i386.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Access for i386 machines
9 * +1 (303) 786-7975
16 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
45 * original BIOS BAR addresses for possible reinstatement.
65 if (map->dev == dev) in pcibios_fwaddrmap_lookup()
88 map->dev = pci_dev_get(dev); in pcibios_save_fw_addr()
89 map->fw_addr[idx] = fw_addr; in pcibios_save_fw_addr()
90 INIT_LIST_HEAD(&map->list); in pcibios_save_fw_addr()
93 list_add_tail(&map->list, &pcibios_fwaddrmappings); in pcibios_save_fw_addr()
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| /linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | imi,rdacm2x-gmsl.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/imi,rdacm2x-gmsl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
16 description: -|
17 The IMI D&D RDACM20 and RDACM21 are GMSL-compatible camera designed for
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| /linux/Documentation/networking/device_drivers/fddi/ |
| H A D | defza.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Notes on the DEC FDDIcontroller 700 (DEFZA-xx) driver
10 DEC FDDIcontroller 700 is DEC's first-generation TURBOchannel FDDI
15 First is the SAS MMF DEFZA-AA option, the original design implementing
16 the standard MMF-PMD, however with a pair of ST connectors rather than
17 the usual MIC connector. The other one is the SAS ThinWire/STP DEFZA-CA
18 option, denoted 700-C, with the network medium selectable by a switch
19 between the DEC proprietary ThinWire-PMD using a BNC connector and the
20 standard STP-PMD using a DE-9F connector. This option can interface to
21 a DECconcentrator 500 device and, in the case of the STP-PMD, also other
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| /linux/arch/powerpc/kernel/ |
| H A D | pci_of_scan.c | 1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <asm/pci-bridge.h>
20 * get_int_prop - Decode a u32 from a device tree property
34 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
38 * PCI Bus Binding to IEEE Std 1275-1994
49 * t is 1 if the address is aliased (for non-relocatable I/O),
54 * 10 denotes 32-bit-address Memory Space
55 * 11 denotes 64-bit-address Memory Space
56 * bbbbbbbb is the 8-bit Bus Number
57 * ddddd is the 5-bit Device Number
[all …]
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