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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Darm,arch_timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
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H A Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM memory mapped architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
15 frames with a physical and optional virtual timer per frame.
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
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H A Darm,armv7m-systick.txt1 * ARMv7M System Timer
3 ARMv7-M includes a system timer, known as SysTick. Current driver only
7 - compatible : Should be "arm,armv7m-systick"
8 - reg : The address range of the timer
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM SysTick
16 systick: timer@e000e010 {
17 compatible = "arm,armv7m-systick";
22 systick: timer@e000e010 {
23 compatible = "arm,armv7m-systick";
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H A Darm,armv7m-systick.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,armv7m-systick.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARMv7M System Timer
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
13 description: ARMv7-M includes a system timer, known as SysTick.
17 const: arm,armv7m-systick
25 clock-frequency: true
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/freebsd/sys/arm/conf/
H A DNOTES1 # arm-specific changes for doing a LINT build.
4 machine arm armv7
7 makeoptions CONF_CFLAGS+="-march=armv7a"
9 # Add options for armv7 that are not in sys/conf/NOTES...
13 options LINUX_BOOT_ABI # Process metadata passed from U-Boot
18 # NOTE: dtrace introduces CDDL-licensed components into the kernel
25 device generic_timer # ARM Generic Timer
28 device mpcore_timer # ARM MPCore Timer
33 device xdma # xDMA framework for SoC on-chip dma controllers
45 device al_pci # Annapurna Alpine PCI-E
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H A DZEDBOARD2 # ZEDBOARD -- Custom configuration for the Xilinx Zynq-7000 based
8 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
23 include "std.armv7"
54 # ARM MPCore timer
85 device axe # USB-Ethernet
H A DGENERIC2 # GENERIC -- Generic(ish) kernel config.
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 machine arm armv7
26 makeoptions CONF_CFLAGS="-march=armv7a"
28 include "std.armv7"
84 # ARM Generic Timer
95 device ahci # AHCI-compatible SATA controllers
129 device p2wi # Allwinner Push-Pull Two Wire
187 device axe # USB-Ethernet
188 device umass # Disks/Mass storage - Requires scbus and da
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/freebsd/sys/arm/include/
H A Dsysreg.h1 /*-
31 * Note that when register r0 is hard-coded in these definitions it means the
33 * because some syntatically-valid register name has to appear at that point to
98 #define CP15_NSACR(rr) p15, 0, rr, c1, c1, 2 /* Non-Secure Access Control Register */
130 /* From ARMv7: */
149 /* From ARMv7: */
169 /* From ARMv7: */
170 #define CP15_ATS12NSOPR(rr) p15, 0, rr, c7, c8, 4 /* Stages 1 and 2 Non-secure only PL1 read */
171 #define CP15_ATS12NSOPW(rr) p15, 0, rr, c7, c8, 5 /* Stages 1 and 2 Non-secure only PL1 write */
172 #define CP15_ATS12NSOUR(rr) p15, 0, rr, c7, c8, 6 /* Stages 1 and 2 Non-secure only unprivileged r…
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/freebsd/sys/contrib/device-tree/src/arm/socionext/
H A Dmilbeaut-m10v.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/irq.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/calxeda/
H A Decx-2000.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a15";
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/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-t113s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <riscv/allwinner/sunxi-d1s-t113.dtsi>
8 #include <riscv/allwinner/sunxi-d1-t11
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/freebsd/sys/contrib/device-tree/src/arm/xen/
H A Dxenvm-4.2.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
10 /dts-v1/;
13 model = "XENVM-4.2";
14 compatible = "xen,xenvm-4.2", "xen,xenvm";
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt8127.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 interrupt-parent = <&sysirq>;
18 #address-cells = <1>;
19 #size-cells = <0>;
20 enable-method = "mediatek,mt81xx-tz-smp";
24 compatible = "arm,cortex-a7";
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H A Dmt8135.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/mt8135-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/mt8135-resets.h>
12 #include <dt-bindings/pinctrl/mt8135-pinfunc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
18 interrupt-parent = <&sysirq>;
20 cpu-map {
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/freebsd/sys/contrib/device-tree/src/arm/sunplus/
H A Dsunplus-sp7021-achip.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include "sunplus-sp7021.dtsi"
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "sunplus,sp7021-achip", "sunplus,sp7021";
14 #address-cells = <1>;
15 #size-cells = <1>;
16 interrupt-parent = <&gic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
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/freebsd/sys/contrib/device-tree/src/arm64/arm/
H A Dcorstone1000.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <1>;
13 #size-cells = <1>;
21 stdout-path = "serial0:115200n8";
25 #address-cells = <1>;
26 #size-cells = <0>;
30 compatible = "arm,cortex-a35";
32 next-level-cache = <&L2_0>;
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/freebsd/sys/contrib/device-tree/src/arm/intel/axm/
H A Daxm55xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/lsi,axm5516-clks.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&gic>;
21 timer = &timer0;
25 compatible = "simple-bus";
26 #address-cells = <2>;
27 #size-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
48 timer: timer { label
49 compatible = "arm,armv7-timer";
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm6846.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
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H A Dbcm63148.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "brcm,brahma-b15";
24 next-level-cache = <&L2_0>;
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H A Dbcm6878.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
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H A Dbcm6855.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
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H A Dbcm63178.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
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/freebsd/sys/contrib/device-tree/src/arm/amazon/
H A Dalpine.dtsi27 #include <dt-bindings/interrupt-controller/arm-gic.h>
30 #address-cells = <2>;
31 #size-cells = <2>;
42 #address-cells = <1>;
43 #size-cells = <0>;
44 enable-method = "al,alpine-smp";
47 compatible = "arm,cortex-a1
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/freebsd/sys/arm/arm/
H A Dgeneric_timer.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
36 * Cortex-A7, Cortex-A15, ARMv8 and later Generic Timer
91 #define GT_CNTKCTL_PL0PTEN (1 << 9) /* PL0 Physical timer reg access */
92 #define GT_CNTKCTL_PL0VTEN (1 << 8) /* PL0 Virtual timer reg access */
131 .name = "sec-phys",
146 .name = "hyp-phys",
151 .name = "hyp-virt",
281 /* Always enable the virtual timer */ in setup_user_access()
283 /* Enable the physical timer if supported */ in setup_user_access()
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