arm: Assume __ARM_ARCH == 7

The only supported 32-bit Arm architecture is Armv7. Remove old checks
for earlier architecture revisions.

Sponsored by: Arm Ltd
Differential Revision: https://reviews.f

arm: Assume __ARM_ARCH == 7

The only supported 32-bit Arm architecture is Armv7. Remove old checks
for earlier architecture revisions.

Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D45957

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sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

Remove the pre-ARMv6 and pre-INTRNG code.
ARM has required ARMV6+ and INTRNg for some time now, so remove
always false #ifdefs and unconditionally do always true #ifdefs.

Add the virtualisation special register definitions.

Submitted by: Mihai Carabas <mihai.carabas@gmail.com>
Reviewed by: mmel
Differential Revision: https://reviews.freebsd.org/D11846

Add the early hypervisor code needed on 32-bit ARMv7. This will be used
when we bring in bhyve support.

Submitted by: Mihai Carabas <mihai.carabas AT gmail.com>
Differential Revision: https://review

Add the early hypervisor code needed on 32-bit ARMv7. This will be used
when we bring in bhyve support.

Submitted by: Mihai Carabas <mihai.carabas AT gmail.com>
Differential Revision: https://reviews.freebsd.org/D10045

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Merge ^/head r313055 through r313300.

MFhead@r313243

Remake support for SMP kernel on UP cpu:
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
By this, any SMP kernel can be compiled with SMP_ON_UP support.
- Enable runtime dete

Remake support for SMP kernel on UP cpu:
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
By this, any SMP kernel can be compiled with SMP_ON_UP support.
- Enable runtime detection of CPU multiprocessor extensions only
if SMP_ON_UP option is used. In other cases (pure SMP or UP),
statically compile only required variant.
- Don't leak multiprocessor instructions to UP kernel.
- Correctly handle data cache write back to point of unification.
DCCMVAU is supported on all armv7 cpus.
- For SMP_ON_UP kernels, detect proper TTB flags on runtime.

Differential Revision: https://reviews.freebsd.org/D9133

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Merge ^/head r303250 through r308226.

Allow an SMP kernel to boot on Cortex-A8:
* Rename ARM_HAVE_MP_EXTENSIONS to ARM_USE_MP_EXTENSIONS and extend it to
handle more cases, including when SMP is not enabled.
* Check ARM_USE_MP_EXTEN

Allow an SMP kernel to boot on Cortex-A8:
* Rename ARM_HAVE_MP_EXTENSIONS to ARM_USE_MP_EXTENSIONS and extend it to
handle more cases, including when SMP is not enabled.
* Check ARM_USE_MP_EXTENSIONS when building for ARMv7+, even if no SMP.
* Use ARM_USE_MP_EXTENSIONS in pmap-v6.c to detect when to set PRRR_NS1.

With this we should be able to boot on all ARMv7+ Cortex-A cores with
32-bit support.

Reviewed by: mmel, imp (earlier version)
Relnotes: yes
Sponsored by: ABT Systems Ltd
Differential Revision: https://reviews.freebsd.org/D8335

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Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't
have ACLE support built in. The ACLE (ARM C Language Extensions) defines
a set of standardized symbols which indicate the arch

Include machine/acle-compat.h in cdefs.h on arm if the compiler doesn't
have ACLE support built in. The ACLE (ARM C Language Extensions) defines
a set of standardized symbols which indicate the architecture version and
features available. ACLE support is built in to modern compilers (both
clang and gcc), but absent from gcc prior to 4.4.

ARM (the company) provides the acle-compat.h header file to define the
right symbols for older versions of gcc. Basically, acle-compat.h does
for arm about the same thing cdefs.h does for freebsd: defines
standardized macros that work no matter which compiler you use. If ARM
hadn't provided this file we would have ended up with a big #ifdef __arm__
section in cdefs.h with our own compatibility shims.

Remove #include <machine/acle-compat.h> from the zillion other places (an
ever-growing list) that it appears. Since style(9) requires sys/types.h
or sys/param.h early in the include list, and both of those lead to
including cdefs.h, only a couple special cases still need to include
acle-compat.h directly.

Loves it: imp

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MfH @r295202

Expect to see panics in routing code at least now.

MFH

Sponsored by: The FreeBSD Foundation

Merge ^/head r294599 through r294776.

Introduce support for HW watchpoints and single stepping for ARMv6/v7

Allows for using hardware watchpoints for 1, 2, 4, 8 byte long addresses.
The default configuration of watchpoint is RW but code

Introduce support for HW watchpoints and single stepping for ARMv6/v7

Allows for using hardware watchpoints for 1, 2, 4, 8 byte long addresses.
The default configuration of watchpoint is RW but code allows to select
RO or WO and X.
Since debugging registers are per-CPU (CP14) the watchpoint is set on
the CPU that was lucky (or not) to enter DDB.

HW breakpoints are used to perform single step in KDB.
When HW breakpoint is enabled all watchpoints are temporary disabled
to avoid recursive abort on both watchpoint and breakpoint.
In case of branch, the breakpoint is set to both - next instruction
and possible branch address. This requires at least 2 breakpoints
supported in the CPU however this is a must for ARMv6/v7 CPUs.

Reviewed by: imp
Submitted by: Zbigniew Bodek <zbb@semihalf.com>
Obtained from: Semihalf
Sponsored by: Juniper Networks Inc.
Differential Revision: https://reviews.freebsd.org/D4037

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MFH r289384-r293170

Sponsored by: The FreeBSD Foundation

Catch up with head (r291075).

Fix cp15 PAR definition and function. While here, add cp15 ATS1CPW
function which checks an address for privileged (PL1) write access.
The function is inlined so it does not bring any cost, but makes

Fix cp15 PAR definition and function. While here, add cp15 ATS1CPW
function which checks an address for privileged (PL1) write access.
The function is inlined so it does not bring any cost, but makes
function set for checking privileged access complete.

Approved by: kib (mentor)

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Catch up with HEAD (r280229-r284686).

MFH: r282615-r283655

Sponsored by: The FreeBSD Foundation

Merge sync of head

Add more cp15_ functions, and use them in cpufunc.c where possible.

Merge from HEAD

Add new CP15 operations and DB_SHOW_COMMAND to print CP15 registers

Submitted by: Wojciech Macek <wma@semihalf.com>
Reviewed by: imp, Michal Meloun <meloun@miracle.cz>
Obtained from: Semihalf

MFH: r280643-r281852

Sponsored by: The FreeBSD Foundation