/freebsd/sys/contrib/device-tree/src/arm64/realtek/ |
H A D | rtd16xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; 17 reserved-memory { 18 #address-cells = <1>; 19 #size-cells = <1>; 32 no-map; [all …]
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H A D | rtd129x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 5 * Copyright (c) 2016-2019 Andreas Färber 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/realtek,rtd1295.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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H A D | rtd139x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/realtek,rtd1295.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 19 reserved-memory { 20 #address-cells = <1>; 21 #size-cells = <1>; 34 no-map; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/intel/ |
H A D | keembay-soc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a53"; 23 enable-method = "psci"; 27 compatible = "arm,cortex-a53"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amazon/ |
H A D | alpine-v2.dtsi | 4 * Antoine Tenart <antoine.tenart@free-electrons.com> 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 35 /dts-v1/; 37 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 compatible = "al,alpine-v2"; 42 #address-cell [all...] |
H A D | alpine-v3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "amazon,al-alpine-v [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/al/ |
H A D | alpine-v2.dtsi | 4 * Antoine Tenart <antoine.tenart@free-electrons.com> 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 35 /dts-v1/; 37 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 compatible = "al,alpine-v2"; 42 #address-cells = <2>; 43 #size-cells = <2>; 46 #address-cells = <2>; 47 #size-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/realtek/ |
H A D | rtd1195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 * Copyright (c) 2017-2019 Andreas Färber 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/realtek,rtd1195.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a7"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/net/nfc/ |
H A D | nfcmrvl.txt | 4 - compatible: Should be: 5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices 6 - "marvell,nfc-i2c" for I2C devices 7 - "marvell,nfc-spi" for SPI devices 10 - pinctrl-names: Contains only one value - "default". 11 - pintctrl-0: Specifies the pin control groups used for this controller. 12 - reset-n-io: Output GPIO pin used to reset the chip (active low). 13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames. 15 Optional UART-based chip specific properties: 16 - flow-control: Specifies that the chip is using RTS/CTS. [all …]
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gi [all...] |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-binding [all...] |
/freebsd/sys/dts/arm/ |
H A D | annapurna-alpine.dts | 1 /*- 28 /dts-v1/; 32 #address-cells = <1>; 33 #size-cells = <1>; 40 #address-cells = <1>; 41 #size-cells = <0>; 45 compatible = "arm,cortex-a15"; 47 d-cache-line-size = <64>; // 64 bytes 48 i-cache-line-size = <64>; // 64 bytes 49 d-cache-size = <0x8000>; // L1, 32K [all …]
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/freebsd/sys/contrib/device-tree/Bindings/serial/ |
H A D | pl011.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM AMBA Primecell PL011 serial UART 10 - Rob Herring <robh@kernel.org> 13 - $ref: /schemas/arm/primecell.yaml# 14 - $ref: serial.yaml# 16 # Need a custom select here or 'arm,primecell' will match on lots of nodes 22 - arm,pl011 24 - compatible [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/bitmain/ |
H A D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/src/arm/renesas/ |
H A D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 14 #address-cell [all...] |
/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-39x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 31 #address-cells = <1>; 32 #size-cells = <0>; 33 enable-method = "marvell,armada-390-smp"; 37 compatible = "arm,cortex-a9"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | apple.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/apple.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple ARM Machine 10 - Hector Martin <marcan@marcan.st> 13 ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon". 17 - Mac mini (M1, 2020) 18 - MacBook Pro (13-inch, M1, 2020) 19 - MacBook Air (M1, 2020) [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
H A D | sun50i-a100.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/sun50i-a100-cc [all...] |
H A D | sun50i-h616.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 // Copyright (C) 2020 Arm Ltd. 4 // Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | ac5-98dx25xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 interrupt-parent = <&gic>; 16 #address-cell [all...] |
H A D | armada-ap810-ap0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 /dts-v1/; 14 compatible = "marvell,armada-ap810"; 15 #address-cells = <2>; 16 #size-cells = <2>; 24 compatible = "arm,psci-0.2"; 28 ap810-ap0 { 29 #address-cells = <2>; 30 #size-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/amazon/ |
H A D | alpine.dtsi | 27 #include <dt-bindings/interrupt-controller/arm-gic.h> 30 #address-cells = <2>; 31 #size-cells = <2>; 42 #address-cells = <1>; 43 #size-cells = <0>; 44 enable-method = "al,alpine-sm [all...] |
/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-cygnus.h> 38 #address-cells = <1>; 39 #size-cell [all...] |
/freebsd/contrib/llvm-project/llvm/tools/llvm-pdbutil/ |
H A D | PdbYaml.cpp | 1 //===-- PdbYaml.cpp ------------------------------------------- *- C++ --*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 34 static void enumeration(IO &io, llvm::pdb::PDB_Machine &Value) { in enumeration() 35 io.enumCase(Value, "Invalid", PDB_Machine::Invalid); in enumeration() 36 io.enumCase(Value, "Am33", PDB_Machine::Am33); in enumeration() 37 io.enumCase(Value, "Amd64", PDB_Machine::Amd64); in enumeration() 38 io.enumCase(Value, "Arm", PDB_Machine::Arm); in enumeration() 39 io.enumCase(Value, "ArmNT", PDB_Machine::ArmNT); in enumeration() 40 io.enumCase(Value, "Ebc", PDB_Machine::Ebc); in enumeration() [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controlle [all...] |