Lines Matching +full:arm +full:- +full:io
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
65 /include/ "bcm-cygnus-clock.dtsi"
68 compatible = "arm,cortex-a9-pmu";
73 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
79 compatible = "arm,cortex-a9-global-timer";
85 gic: interrupt-controller@21000 {
86 compatible = "arm,cortex-a9-gic";
87 #interrupt-cells = <3>;
88 #address-cells = <0>;
89 interrupt-controller;
94 L2: cache-controller@22000 {
95 compatible = "arm,pl310-cache";
97 cache-unified;
98 cache-level = <2>;
103 compatible = "simple-bus";
105 #address-cells = <1>;
106 #size-cells = <1>;
111 brcm,ocotp-size = <2048>;
116 compatible = "brcm,cygnus-pcie-phy";
118 #address-cells = <1>;
119 #size-cells = <0>;
121 pcie0_phy: pcie-phy@0 {
123 #phy-cells = <0>;
126 pcie1_phy: pcie-phy@1 {
128 #phy-cells = <0>;
133 compatible = "brcm,cygnus-pinmux";
154 compatible = "brcm,iproc-mailbox";
157 #interrupt-cells = <1>;
158 interrupt-controller;
159 #mbox-cells = <1>;
163 compatible = "brcm,cygnus-crmu-gpio";
167 #gpio-cells = <2>;
168 gpio-controller;
169 interrupt-controller;
170 #interrupt-cells = <2>;
171 interrupt-parent = <&mailbox>;
176 compatible = "brcm,iproc-mdio";
178 #size-cells = <0>;
179 #address-cells = <1>;
182 gphy0: ethernet-phy@0 {
186 gphy1: ethernet-phy@1 {
192 compatible = "brcm,bcm11360-srab", "brcm,cygnus-srab";
197 #address-cells = <1>;
198 #size-cells = <0>;
202 phy-handle = <&gphy0>;
203 phy-mode = "rgmii";
208 phy-handle = <&gphy1>;
209 phy-mode = "rgmii";
216 fixed-link {
218 full-duplex;
225 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
227 #address-cells = <1>;
228 #size-cells = <0>;
230 clock-frequency = <100000>;
235 compatible = "arm,sp805" , "arm,primecell";
239 clock-names = "wdog_clk", "apb_pclk";
243 compatible = "brcm,cygnus-ccm-gpio";
247 #gpio-cells = <2>;
248 gpio-controller;
250 interrupt-controller;
251 #interrupt-cells = <2>;
255 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
257 #address-cells = <1>;
258 #size-cells = <0>;
260 clock-frequency = <100000>;
265 compatible = "brcm,iproc-pcie";
268 #interrupt-cells = <1>;
269 interrupt-map-mask = <0 0 0 0>;
270 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
272 linux,pci-domain = <0>;
274 bus-range = <0x00 0xff>;
276 #address-cells = <3>;
277 #size-cells = <2>;
283 phy-names = "pcie-phy";
287 msi-parent = <&msi0>;
289 compatible = "brcm,iproc-msi";
290 msi-controller;
291 interrupt-parent = <&gic>;
300 compatible = "brcm,iproc-pcie";
303 #interrupt-cells = <1>;
304 interrupt-map-mask = <0 0 0 0>;
305 interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
307 linux,pci-domain = <1>;
309 bus-range = <0x00 0xff>;
311 #address-cells = <3>;
312 #size-cells = <2>;
318 phy-names = "pcie-phy";
322 msi-parent = <&msi1>;
324 compatible = "brcm,iproc-msi";
325 msi-controller;
326 interrupt-parent = <&gic>;
335 compatible = "arm,pl330", "arm,primecell";
347 clock-names = "apb_pclk";
348 #dma-cells = <1>;
352 compatible = "snps,dw-apb-uart";
354 reg-shift = <2>;
355 reg-io-width = <4>;
358 clock-frequency = <100000000>;
363 compatible = "snps,dw-apb-uart";
365 reg-shift = <2>;
366 reg-io-width = <4>;
369 clock-frequency = <100000000>;
374 compatible = "snps,dw-apb-uart";
376 reg-shift = <2>;
377 reg-io-width = <4>;
380 clock-frequency = <100000000>;
385 compatible = "snps,dw-apb-uart";
387 reg-shift = <2>;
388 reg-io-width = <4>;
391 clock-frequency = <100000000>;
396 compatible = "arm,pl022", "arm,primecell";
398 #address-cells = <1>;
399 #size-cells = <0>;
401 pinctrl-0 = <&spi_0>;
403 clock-names = "sspclk", "apb_pclk";
408 compatible = "arm,pl022", "arm,primecell";
410 #address-cells = <1>;
411 #size-cells = <0>;
413 pinctrl-0 = <&spi_1>;
415 clock-names = "sspclk", "apb_pclk";
420 compatible = "arm,pl022", "arm,primecell";
422 #address-cells = <1>;
423 #size-cells = <0>;
425 pinctrl-0 = <&spi_2>;
427 clock-names = "sspclk", "apb_pclk";
432 compatible = "brcm,iproc-rng200";
437 compatible = "brcm,sdhci-iproc-cygnus";
441 bus-width = <4>;
442 sdhci,auto-cmd12;
450 reg-names = "amac_base", "idm_base";
456 compatible = "brcm,sdhci-iproc-cygnus";
460 bus-width = <4>;
461 sdhci,auto-cmd12;
465 nand_controller: nand-controller@18046000 {
466 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
469 reg-names = "nand", "iproc-idm", "iproc-ext";
472 #address-cells = <1>;
473 #size-cells = <0>;
475 brcm,nand-has-wp;
479 compatible = "generic-ehci";
486 compatible = "generic-ohci";
493 compatible = "arm,pl111", "arm,primecell";
496 interrupt-names = "combined";
498 clock-names = "clcdclk", "apb_pclk";
503 compatible = "brcm,cygnus-v3d";
506 clock-names = "v3d_clk";
512 compatible = "brcm,cygnus-vc4";
516 compatible = "brcm,cygnus-asiu-gpio";
519 #gpio-cells = <2>;
520 gpio-controller;
522 interrupt-controller;
523 #interrupt-cells = <2>;
525 gpio-ranges = <&pinctrl 0 42 1>,
579 compatible = "brcm,iproc-ts-adc-syscon", "syscon";
584 compatible = "brcm,iproc-touchscreen";
585 #address-cells = <1>;
586 #size-cells = <1>;
589 clock-names = "tsc_clk";
595 compatible = "brcm,iproc-static-adc";
596 #io-channel-cells = <1>;
597 adc-syscon = <&ts_adc_syscon>;
599 clock-names = "tsc_clk";
605 compatible = "brcm,kona-pwm";
607 #pwm-cells = <3>;
613 compatible = "brcm,bcm-keypad";
617 clock-names = "peri_clk";
618 clock-frequency = <31250>;
619 pull-up-enabled;
620 col-debounce-filter-period = <0>;
621 status-debounce-filter-period = <0>;
622 row-output-enabled;