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/freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/
H A D	frontend.json	89 …e processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 90 …e processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 95 …The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 o… 96 …The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 o… 101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di… 102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d… 107 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on … 108 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on… 203 …sor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a… 204 …sor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a… [all …]
H A D	marked.json	35 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 41 …"BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or… 47 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi… 53 …"BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L… 59 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 65 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on a different Node or Gr… 71 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 77 …"BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or G… 251 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a… 257 …"BriefDescription": "Duration in cycles to reload either shared or modified data from another core… [all …]
H A D	other.json	383 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 384 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 389 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi… 390 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch… 395 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 396 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen… 401 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 402 …"PublicDescription": "The processor's data cache was reloaded from another chip's memory on the sa… 413 …n": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the … 414 …n": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the … [all …]
H A D	cache.json	5 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 6 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 11 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi… 12 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch… 17 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 18 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen… 107 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a… 108 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a… 113 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on t… 114 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on t… [all …]
H A D	translation.json	29 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 o… 35 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o… 107 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a… 113 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on t… 119 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 o… 125 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o… 131 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same…
H A D	memory.json	17 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 18 …"PublicDescription": "The processor's data cache was reloaded from another chip's memory on the sa… 35 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… 36 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on the same N… 41 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 42 …"PublicDescription": "The processor's data cache was reloaded from another chip's memory on the sa… 95 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ… 101 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the … 107 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …
/freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/
H A D	translation.json	15 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another cor… 25 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the … 35 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o… 60 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o… 75 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on t… 80 …The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the … 95 …n": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the … 100 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same… 135 …"BriefDescription": "Duration in cycles to reload with Modified (M) data from another chip's L2 or… 150 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a… [all …]
H A D	pipeline.json	30 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on t… 35 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ… 80 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the … 90 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different… 95 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the … 100 …eing held at dispatch because it lost arbitration onto the issue pipe to another instruction (from… 145 … from beyond the local L3. The source could be local/remote/distant memory or another core's cache" 160 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a… 190 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… 235 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o… [all …]
H A D	marked.json	10 … the core's L3 data cache. The source could be local/remote/distant memory or another core's cache" 20 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the … 25 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam… 70 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on … 95 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on … 100 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on … 120 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on … 180 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another cor… 185 …n": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the … 190 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… [all …]
H A D	cache.json	25 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group… 40 …sor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on t… 50 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the … 55 …The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 o… 80 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the … 100 …e processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 o…
H A D	frontend.json	5 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the … 50 …n": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on … 115 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the … 155 …"BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L… 170 …"BriefDescription": "Duration in cycles to reload either shared or modified data from another core… 195 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the … 280 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 o… 315 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on … 330 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… 335 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another cor… [all …]
/freebsd/lib/libpmc/pmu-events/arch/s390/cf_z10/
H A D	crypto.json	18 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 24 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 42 …PU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 48 … issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 66 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 72 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 90 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 96 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
/freebsd/lib/libpmc/pmu-events/arch/s390/cf_z13/
H A D	crypto.json	18 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 24 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 42 …PU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 48 … issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 66 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 72 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 90 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 96 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
/freebsd/lib/libpmc/pmu-events/arch/s390/cf_z14/
H A D	crypto.json	18 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 24 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 42 …PU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 48 … issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 66 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 72 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 90 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 96 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
/freebsd/lib/libpmc/pmu-events/arch/s390/cf_z196/
H A D	crypto.json	18 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 24 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 42 …PU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 48 … issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 66 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 72 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 90 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 96 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
/freebsd/lib/libpmc/pmu-events/arch/s390/cf_zec12/
H A D	crypto.json	18 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 24 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 42 …PU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 48 … issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 66 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 72 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 90 …nd are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 96 …ued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
/freebsd/contrib/kyua/utils/text/
H A D	regex_test.cpp	75 "is ([^ ]) ([a-z]) to", "this is another string to parse", 2); in ATF_TEST_CASE_BODY() 78 ATF_REQUIRE_EQ("is another string to", matches.get(0)); in ATF_TEST_CASE_BODY() 79 ATF_REQUIRE_EQ("another", matches.get(1)); in ATF_TEST_CASE_BODY() 88 "is ([^ ]) ([a-z]) to", "this is another string to parse", 1); in ATF_TEST_CASE_BODY() 91 ATF_REQUIRE_EQ("is another string to", matches.get(0)); in ATF_TEST_CASE_BODY() 92 ATF_REQUIRE_EQ("another", matches.get(1)); in ATF_TEST_CASE_BODY() 100 "is ([^ ]) ([a-z]) to", "this is another string to parse", 10); in ATF_TEST_CASE_BODY() 103 ATF_REQUIRE_EQ("is another string to", matches.get(0)); in ATF_TEST_CASE_BODY() 104 ATF_REQUIRE_EQ("another", matches.get(1)); in ATF_TEST_CASE_BODY()
/freebsd/usr.bin/diff/tests/
H A D	unified_9999.out	`7 - * And another bla 8 + * And another bla 10 - * And yet another 11 + * and yet another`
H A D	unified_p.out	`7 - * And another bla 8 + * And another bla 10 - * And yet another 11 + * and yet another`
H A D	ifdef.out	`5 * And another bla 7 * And another bla 11 * And yet another 13 * and yet another`
H A D	simple_p.out	`8 ! * And another bla 10 ! * And yet another 23 ! * And another bla 25 ! * and yet another`
H A D	group-format.out	`5 * And another bla 7 * And another bla 11 * And yet another 13 * and yet another`
H A D	unified_c9999.out	`8 ! * And another bla 10 ! * And yet another 24 ! * And another bla 26 ! * and yet another`
/freebsd/share/doc/psd/01.cacm/
H A D	p4	45 to accept another command by typing a prompt character. 144 the input of another. 210 Another feature provided by the \&shell is relatively straightforward. 262 The \&shell also returns immediately for another request. 338 it types its prompt and reads the keyboard to obtain another 394 reads another command line.) 412 is the child of another instance of the \&shell, the 414 executed in the latter will return, and another 420 commands are themselves children of another process. 466 input and output files and types another log-in message.
/freebsd/share/man/man9/
H A D	mutex.9	`203 If another kernel thread is holding the mutex, 214 If another kernel thread is holding the mutex, 328 or have another thread blocked on the mutex 411 if the lock is already held by another thread. 424 but will loop, waiting for the mutex to be released by another CPU. 426 if another thread interrupted the thread which held a mutex 514 Put another way: it is impossible to acquire 517 holding another mutex.`

12 3 4 5 6 7 8 9 10 >>...88