Lines Matching full:another
30 … processor's data cache was reloaded either shared or modified data from another core's L2/L3 on t…
35 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on a differ…
80 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the …
90 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
95 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the …
100 …eing held at dispatch because it lost arbitration onto the issue pipe to another instruction (from…
145 … from beyond the local L3. The source could be local/remote/distant memory or another core's cache"
160 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a…
190 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o…
235 …n": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 o…
250 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o…
260 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 o…
265 …"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's memory on the …
285 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam…
305 …"BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L2 on…
310 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 o…
325 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi…
380 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 o…
390 … Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on t…
395 …": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the …
400 … "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the …
435 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another cor…
515 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another cor…
530 …"BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L2 on t…