Searched +full:am654 +full:- +full:icssg (Results 1 – 14 of 14) sorted by relevance
/linux/Documentation/devicetree/bindings/net/ |
H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments ICSSG PRUSS Ethernet 10 - Md Danish Anwar <danishanwar@ti.com> 13 Ethernet based on the Programmable Real-Time Unit and Industrial 19 - ti,am642-icssg-prueth # for AM64x SoC family 20 - ti,am654-icssg-prueth # for AM65x SoC family 21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | ti,pru-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 Each Programmable Real-Time Unit and Industrial Communication Subsystem 14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called 15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU 17 use the Data RAMs present within the PRU-ICSS for code execution. 19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-am65-iot2050-common-pg1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2021-2023 11 #include "k3-am65-iot2050-dp.dtsi" 18 no-1-8-v; 46 compatible = "ti,am654-sr1-icssg-prueth"; 49 firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf", 50 "ti-pruss/am65x-rtu0-prueth-fw.elf", 51 "ti-pruss/am65x-pru1-prueth-fw.elf", 52 "ti-pruss/am65x-rtu1-prueth-fw.elf"; 54 ti,pruss-gp-mux-sel = <2>, /* MII mode */ [all …]
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H A D | k3-am654-idk.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * DT overlay for IDK application board on AM654 EVM 5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include "k3-pinctrl.h" 17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0"; 18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1"; 19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0"; [all …]
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H A D | k3-am65-iot2050-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) Siemens AG, 2018-2024 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/net/ti-dp83867.h> 36 stdout-path = "serial3:115200n8"; 39 reserved-memory { 40 #address-cells = <2>; 41 #size-cells = <2>; 44 secure_ddr: secure-ddr@9e800000 { [all …]
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/linux/Documentation/devicetree/bindings/soc/ti/ |
H A D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 11 - Suman Anna <s-anna@ti.com> 15 The Programmable Real-Time Unit and Industrial Communication Subsystem 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 23 peripheral interfaces, fast real-time responses, or specialized data handling. [all …]
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/linux/drivers/net/ethernet/ti/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 106 This driver supports TI K3 AM654/J721E CPSW2G Ethernet SubSystem. 107 The two-port Gigabit Ethernet MAC (MCU_CPSW0) subsystem provides 113 will be called ti-am65-cpsw-nuss. 133 the IEEE 1588-2008 standard for a precision clock synchronization 143 MQPRIO qdisc offload and Frame-Preemption MAC Merge / Interspersing 195 Support dual Gigabit Ethernet ports over the ICSSG PRU Subsystem. 211 Support dual Gigabit Ethernet ports over the ICSSG PRU Subsystem. 224 This driver enables support for the PRU-ICSS Industrial Ethernet 225 Peripheral within a PRU-ICSS subsystem present on various TI SoCs.
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/linux/drivers/soc/ti/ |
H A D | pruss.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * PRU-ICSS platform driver for various TI SoCs 5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/ 7 * Suman Anna <s-anna@ti.com> 9 * Tero Kristo <t-kristo@ti.com> 12 #include <linux/clk-provider.h> 13 #include <linux/dma-mapping.h> 29 * struct pruss_private_data - PRUSS driver private data 39 * pruss_get() - get the pruss for a given PRU remoteproc 53 * -EINVAL if invalid parameter [all …]
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/linux/drivers/net/ethernet/ti/icssg/ |
H A D | icssg_prueth_sr1.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Texas Instruments ICSSG SR1.0 Ethernet Driver 5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 26 #include "../k3-cppi-desc-pool.h" 28 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG SR1.0 Ethernet driver" 34 * situation. So use Q0-Q2 as data queues and Q3 as management queue 62 config.addr_lo = cpu_to_le32(lower_32_bits(prueth->msmcram.pa)); in icssg_config_sr1() 63 config.addr_hi = cpu_to_le32(upper_32_bits(prueth->msmcram.pa)); in icssg_config_sr1() 64 config.rx_flow_id = cpu_to_le32(emac->rx_flow_id_base); /* flow id for host port */ in icssg_config_sr1() 65 config.rx_mgr_flow_id = cpu_to_le32(emac->rx_mgm_flow_id_base); /* for mgm ch */ in icssg_config_sr1() [all …]
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H A D | icssg_prueth.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Texas Instruments ICSSG Ethernet Driver 5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/ 12 #include <linux/dma-mapping.h> 13 #include <linux/dma/ti-cppi5.h> 19 #include <linux/io-64-nonatomic-hi-lo.h> 37 #include "../k3-cppi-desc-pool.h" 39 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver" 56 struct prueth *prueth = emac->prueth; in emac_get_tx_ts() 65 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); in emac_get_tx_ts() [all …]
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H A D | icss_iep.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Texas Instruments ICSSG Industrial Ethernet Peripheral (IEP) Driver 5 * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com 57 * icss_iep_get_count_hi() - Get the upper 32 bit IEP counter 66 if (iep && (iep->plat_data->flags & ICSS_IEP_64BIT_COUNTER_SUPPORT)) in icss_iep_get_count_hi() 67 val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]); in icss_iep_get_count_hi() 74 * icss_iep_get_count_low() - Get the lower 32 bit IEP counter 84 val = readl(iep->base + iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG0]); in icss_iep_get_count_low() 91 * icss_iep_get_ptp_clock_idx() - Get PTP clock index using IEP driver 94 * Return: PTP clock index, -1 if not registered [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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