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/linux/Documentation/devicetree/bindings/ata/
H A Dbrcm,sata-brcm.yaml7 title: Broadcom SATA3 AHCI Controller
17 - $ref: ahci-common.yaml#
24 - brcm,bcm7216-ahci
25 - brcm,bcm7445-ahci
26 - brcm,bcm7425-ahci
27 - brcm,bcm63138-ahci
28 - const: brcm,sata3-ahci
30 - const: brcm,bcm-nsp-ahci
37 - const: ahci
48 - brcm,bcm7216-ahci
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H A Dahci-common.yaml4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
7 title: Common Properties for Serial ATA AHCI controllers
14 This document defines device tree properties for a common AHCI SATA
19 defines a set of common properties for the AHCI-compatible devices.
29 Generic AHCI registers space conforming to the Serial ATA AHCI
35 const: ahci
39 Generic AHCI state change interrupt. Can be implemented either as a
45 ahci-supply:
46 description: Power regulator for AHCI controller
77 $ref: '#/$defs/ahci-port'
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H A Dfsl,ahci.yaml4 $id: http://devicetree.org/schemas/ata/fsl,ahci.yaml#
7 title: Freescale QorIQ AHCI SATA Controller
17 - const: fsl,ls1012a-ahci
18 - const: fsl,ls1043a-ahci
20 - fsl,ls1021a-ahci
21 - fsl,ls1028a-ahci
22 - fsl,ls1043a-ahci
23 - fsl,ls1046a-ahci
24 - fsl,ls1088a-ahci
25 - fsl,ls2080a-ahci
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H A Dsnps,dwc-ahci.yaml4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#
7 title: Synopsys DWC AHCI SATA controller
14 implementation of the AHCI SATA controller.
20 - snps,dwc-ahci
21 - snps,spear-ahci
26 - $ref: snps,dwc-ahci-common.yaml#
31 - description: Synopsys AHCI SATA-compatible devices
32 const: snps,dwc-ahci
33 - description: SPEAr1340 AHCI SATA device
34 const: snps,spear-ahci
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H A Dallwinner,sun8i-r40-ahci.yaml4 $id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml#
7 title: Allwinner R40 AHCI SATA Controller
15 const: allwinner,sun8i-r40-ahci
22 - description: AHCI Bus Clock
23 - description: AHCI Module Clock
32 const: ahci
34 ahci-supply:
35 description: Regulator for the AHCI controller
56 ahci: sata@1c18000 {
57 compatible = "allwinner,sun8i-r40-ahci";
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H A Dnvidia,tegra-ahci.yaml4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
7 title: Tegra AHCI SATA Controller
16 - nvidia,tegra124-ahci
17 - nvidia,tegra132-ahci
18 - nvidia,tegra210-ahci
19 - nvidia,tegra186-ahci
24 - description: AHCI registers
102 - nvidia,tegra124-ahci
103 - nvidia,tegra132-ahci
124 - nvidia,tegra210-ahci
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H A Deswin,eic7700-ahci.yaml4 $id: http://devicetree.org/schemas/ata/eswin,eic7700-ahci.yaml#
14 AHCI SATA controller embedded into the EIC7700 SoC is based on the DWC AHCI
20 const: eswin,eic7700-ahci
25 - $ref: snps,dwc-ahci-common.yaml#
30 - const: eswin,eic7700-ahci
31 - const: snps,dwc-ahci
68 compatible = "eswin,eic7700-ahci", "snps,dwc-ahci";
H A Dimx-sata.yaml7 title: Freescale i.MX AHCI SATA Controller
13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
19 - fsl,imx53-ahci
20 - fsl,imx6q-ahci
21 - fsl,imx6qp-ahci
22 - fsl,imx8qm-ahci
99 - fsl,imx53-ahci
100 - fsl,imx6q-ahci
101 - fsl,imx6qp-ahci
112 - fsl,imx8qm-ahci
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H A Dsnps,dwc-ahci-common.yaml4 $id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#
7 title: Synopsys DWC AHCI SATA controller properties
14 AHCI controller properties.
19 - $ref: ahci-common.yaml#
30 Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,
61 normally supported by the DWC AHCI SATA controller.
83 $ref: '#/$defs/dwc-ahci-port'
88 dwc-ahci-port:
89 $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port
H A Dallwinner,sun4i-a10-ahci.yaml4 $id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml#
7 title: Allwinner A10 AHCI SATA Controller
15 const: allwinner,sun4i-a10-ahci
22 - description: AHCI Bus Clock
23 - description: AHCI Module Clock
41 ahci: sata@1c18000 {
42 compatible = "allwinner,sun4i-a10-ahci";
H A Dapm,xgene-ahci.yaml4 $id: http://devicetree.org/schemas/ata/apm,xgene-ahci.yaml#
15 - apm,xgene-ahci
16 - apm,xgene-ahci-v2
21 - description: AHCI memory resource
39 - $ref: ahci-common.yaml#
44 const: apm,xgene-ahci
54 compatible = "apm,xgene-ahci";
H A Dti,da850-ahci.yaml4 $id: http://devicetree.org/schemas/ata/ti,da850-ahci.yaml#
7 title: TI DA850 AHCI SATA Controller
14 const: ti,da850-ahci
18 - description: Address and size of the register map as defined by the AHCI 1.1 standard.
36 compatible = "ti,da850-ahci";
H A Dmediatek,mtk-ahci.yaml4 $id: http://devicetree.org/schemas/ata/mediatek,mtk-ahci.yaml#
13 - $ref: ahci-common.yaml#
19 - mediatek,mt7622-ahci
20 - const: mediatek,mtk-ahci
79 compatible = "mediatek,mt7622-ahci", "mediatek,mtk-ahci";
H A Dceva,ahci-1v84.yaml4 $id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#
7 title: Ceva AHCI SATA Controller
13 The Ceva SATA controller mostly conforms to the AHCI interface with some
15 SATA host controller with an AHCI compliant command layer which supports
21 const: ceva,ahci-1v84
170 sata: ahci@fd0c0000 {
171 compatible = "ceva,ahci-1v84";
H A Dsata_highbank.yaml7 title: Calxeda AHCI SATA Controller
10 The Calxeda SATA controller mostly conforms to the AHCI interface
19 const: calxeda,hb-ahci
82 compatible = "calxeda,hb-ahci";
/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-ahci-glue.yaml4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#
7 title: Socionext UniPhier SoC AHCI glue layer
13 AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband
14 logic handling signals to AHCI host controller inside AHCI component.
20 - socionext,uniphier-pro4-ahci-glue
21 - socionext,uniphier-pxs2-ahci-glue
22 - socionext,uniphier-pxs3-ahci-glue
41 $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#
52 compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd";
59 compatible = "socionext,uniphier-pxs3-ahci-reset";
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/linux/Documentation/devicetree/bindings/phy/
H A Dsocionext,uniphier-ahci-phy.yaml4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
7 title: Socionext UniPhier AHCI PHY
11 AHCI controller implemented on Socionext UniPhier SoCs.
19 - socionext,uniphier-pro4-ahci-phy
20 - socionext,uniphier-pxs2-ahci-phy
21 - socionext,uniphier-pxs3-ahci-phy
50 const: socionext,uniphier-pro4-ahci-phy
75 const: socionext,uniphier-pxs2-ahci-phy
93 const: socionext,uniphier-pxs3-ahci-phy
125 compatible = "socionext,uniphier-pxs3-ahci-phy";
/linux/drivers/ata/
H A Dahci.c3 * ahci.c - AHCI SATA support
14 * AHCI hardware documentation:
32 #include <linux/ahci-remap.h>
34 #include "ahci.h"
36 #define DRV_NAME "ahci"
109 AHCI_SHT("ahci"),
315 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci_pcs_quirk }, /* PCH AHCI */
316 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci_pcs_quirk }, /* PCH AHCI */
319 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_pcs_quirk }, /* PCH M AHCI */
322 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci_pcs_quirk }, /* PCH AHCI */
[all …]
H A Dahci_brcm.c3 * Broadcom SATA3 AHCI Controller Driver
22 #include "ahci.h"
24 #define DRV_NAME "brcm-ahci"
28 #define MMIO_ENDIAN_SHIFT 0 /* CPU->AHCI */
29 #define DMADESC_ENDIAN_SHIFT 2 /* AHCI->DDR */
30 #define DMADATA_ENDIAN_SHIFT 4 /* AHCI->DDR */
53 #define DATA_ENDIAN 2 /* AHCI->DDR inbound accesses */
54 #define MMIO_ENDIAN 2 /* CPU->AHCI outbound accesses */
428 {.compatible = "brcm,bcm7425-ahci", .data = (void *)BRCM_SATA_BCM7425},
429 {.compatible = "brcm,bcm7445-ahci", .data = (void *)BRCM_SATA_BCM7445},
[all …]
H A Dahci_qoriq.c3 * Freescale QorIQ AHCI SATA platform driver
18 #include "ahci.h"
20 #define DRV_NAME "ahci-qoriq"
70 { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A},
71 { .compatible = "fsl,ls1028a-ahci", .data = (void *)AHCI_LS1028A},
72 { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
73 { .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},
74 { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
75 { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},
76 { .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
[all …]
H A Dahci_da850.c3 * DaVinci DA850 AHCI SATA platform driver
13 #include "ahci.h"
18 /* SATA PHY Control Register offset from AHCI base */
176 * This AHCI SATA controller uses two clocks: functional clock in ahci_da850_probe()
234 { .compatible = "ti,da850-ahci", },
250 MODULE_DESCRIPTION("DaVinci DA850 AHCI SATA platform driver");
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dakebono.txt24 1.b) The Advanced Host Controller Interface (AHCI) SATA node
30 - compatible : should be "ibm,476gtr-ahci".
31 - reg : should contain the AHCI registers location and length.
32 - interrupts : should contain the AHCI interrupt.
/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dsata-uctl.txt4 and the SATA AHCI host controller (UAHC). It performs the following functions:
5 - provides interfaces for the applications to access the UAHC AHCI
7 - provides a bridge for UAHC to fetch AHCI command table entries and data
37 compatible = "cavium,octeon-7130-ahci";
/linux/Documentation/devicetree/bindings/reset/
H A Dsocionext,uniphier-glue-reset.yaml27 - socionext,uniphier-pro4-ahci-reset
28 - socionext,uniphier-pxs2-ahci-reset
29 - socionext,uniphier-pxs3-ahci-reset
61 - socionext,uniphier-pro4-ahci-reset
/linux/Documentation/ABI/testing/
H A Dsysfs-class-scsi_host72 as defined in the AHCI spec.
96 (RO) Display the version of the AHCI spec implemented by the
104 (RW) Allows access to AHCI EM (enclosure management) buffer
107 For eg. the AHCI driver supports SGPIO EM messages but the
108 SATA/AHCI specs do not define the SGPIO message format of the EM

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