Home
last modified time | relevance | path

Searched full:addressing (Results 1 – 25 of 417) sorted by relevance

12345678910>>...17

/linux/Documentation/filesystems/
H A Dqnx6.rst56 data and the addressing levels in that specific tree.
60 Level 1 adds an additional indirect addressing level where each indirect
61 addressing block holds up to blocksize / 4 bytes pointers to data blocks.
62 Level 2 adds an additional indirect addressing block level (so, already up
66 indirect addressing blocks or inodes.
97 For more than 16 blocks an indirect addressing in form of another tree is
143 Long filenames are stored in a separate addressing tree. The staring point
165 smaller than addressing space in the bitmap.
183 Bitmap blocks, Inode blocks and indirect addressing blocks for those two
/linux/arch/m68k/math-emu/
H A Dfp_decode.h59 * addressing mode (e.g. pc relative modes as destination), as long
60 * as it only means a new addressing mode, which should not appear
112 | extract the addressing mode
128 | extract the register for the addressing mode
214 | addressing mode: data register direct
220 | addressing mode: address register indirect
244 | addressing mode: address register indirect with postincrement
263 | addressing mode: address register indirect with predecrement
289 | addressing mode: address register/programm counter indirect
331 | all other indirect addressing modes will finally end up here
[all …]
H A Dfp_scan.S133 | decode addressing mode for source
141 | addressing mode: data register direct
171 | addressing mode: address register indirect
176 | addressing mode: address register indirect with postincrement
181 | addressing mode: address register indirect with predecrement
186 | addressing mode: address register/programm counter indirect
192 | all other indirect addressing modes will finally end up here
197 | all pc relative addressing modes and immediate/absolute modes end up here
211 | addressing mode: absolute short
216 | addressing mode: absolute long
[all …]
H A Dfp_move.S64 | encode addressing mode for dest
72 | addressing mode: data register direct
135 | addressing mode: address register indirect
140 | addressing mode: address register indirect with postincrement
145 | addressing mode: address register indirect with predecrement
150 | addressing mode: address register indirect with 16bit displacement
/linux/Documentation/networking/
H A Diso15765-2.rst26 Addressing section in Overview
29 In its simplest form, ISO-TP is based on two kinds of addressing modes for the
32 * physical addressing is implemented by two node-specific addresses and is used
35 * functional addressing is implemented by one node-specific address and is used
38 Three different addressing formats can be employed:
55 is generating and the optional extended addressing. In the first case, the data
163 additional address component. This enables the "mixed" addressing format if
164 used alone, or the "extended" addressing format if used in conjunction with
191 as extended addressing byte on the reception path. If used in conjunction
193 addressing format.
[all …]
/linux/Documentation/scsi/
H A Daha152x.rst126 The BIOS uses a cylinder/head/sector addressing scheme (C/H/S)
128 C/H/S addressing.
131 as base for requests in C/H/S addressing. SCSI only knows about the
135 geometry just to be able to support that addressing scheme. The geometry
141 instead of C/H/S addressing. Unfortunately C/H/S addressing is also used
145 Moreover there are certain limitations to the C/H/S addressing scheme,
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dinstruction.json120 …is event counts architecturally executed operations that uses 'pre-index' as its addressing mode.",
123 …his event counts architecturally executed operations that uses 'pre-index' as its addressing mode."
126 …s event counts architecturally executed operations that uses 'post-index' as its addressing mode.",
129 …is event counts architecturally executed operations that uses 'post-index' as its addressing mode."
/linux/arch/m68k/include/asm/
H A Dmcfdma.h84 #define MCFDMA_DMR_DSTM 0x00002000L /* Destination addressing mask */
85 #define MCFDMA_DMR_DSTM_SA 0x00000000L /* Destination uses static addressing */
86 #define MCFDMA_DMR_DSTM_IA 0x00002000L /* Destination uses incremental addressing */
96 #define MCFDMA_DMR_SRCM 0x00000020L /* Source addressing mask */
97 #define MCFDMA_DMR_SRCM_SA 0x00000000L /* Source uses static addressing */
98 #define MCFDMA_DMR_SRCM_IA 0x00000020L /* Source uses incremental addressing */
/linux/arch/sh/mm/
H A DKconfig78 # Physical addressing modes
89 bool "Support 32-bit physical addressing through PMB"
94 If you say Y here, physical addressing will be extended to
96 29-bit physical addressing will be used.
/linux/include/uapi/linux/can/
H A Disotp.h78 __u8 ext_address; /* set address for extended addressing */
87 __u8 rx_ext_address; /* set address for extended addressing */
128 #define CAN_ISOTP_EXTEND_ADDR 0x0002 /* enable extended addressing */
136 #define CAN_ISOTP_RX_EXT_ADDR 0x0200 /* different rx extended addressing */
138 #define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
/linux/drivers/scsi/sym53c8xx_2/
H A Dsym53c8xx.h32 * DMA addressing mode.
34 * 0 : 32 bit addressing for all chips.
35 * 1 : 40 bit addressing when supported by chip.
36 * 2 : 64 bit addressing when supported by chip,
H A Dsym_glue.h97 * For now, PCI chips are only supported in little endian addressing mode,
117 #error "Chips in BIG ENDIAN addressing mode are not (yet) supported"
121 * If the CPU and the chip use same endian-ness addressing,
/linux/drivers/media/dvb-frontends/drx39xyj/
H A Ddrx_dap_fasi.h37 * Fast access, because of short addressing format (16 instead of 32 bits addr)
64 * Comments about short/long addressing format:
98 #error At least one of short- or long-addressing format must be allowed.
135 * in combination with short and long addressing format. All text below
136 * assumes long addressing format. The table also includes information
137 * for short ADDRessing format.
/linux/drivers/staging/fbtft/
H A Dfb_ssd1305.c72 /* Set Memory Addressing Mode */ in init_display()
74 /* Vertical addressing mode */ in init_display()
124 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win()
126 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
H A Dfb_ssd1306.c73 /* Set Memory Addressing Mode */ in init_display()
75 /* Vertical addressing mode */ in init_display()
138 /* Set Lower Column Start Address for Page Addressing Mode */ in set_addr_win()
140 /* Set Higher Column Start Address for Page Addressing Mode */ in set_addr_win()
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-cpu-thermal.dtsi16 * See 44xx files for single sensor addressing, omap5 and dra7 need
17 * also sensor ID for addressing.
/linux/include/drm/
H A Ddrm_vma_manager.h156 * drm_vma_node_start() - Return start address for page-based addressing
161 * this can only be used for page-based addressing. If you need a proper offset
166 * Start address of @node for page-based addressing. 0 if the node does not
200 * Offset of @node for byte-based addressing. 0 if the node does not have an
/linux/include/uapi/linux/
H A Dserial.h116 * @addr_recv: Receive filter for RS485 addressing mode
118 * @addr_dest: Destination address for RS485 addressing mode
138 * * %SER_RS485_ADDRB - Enable RS485 addressing mode.
/linux/include/linux/dma/
H A Dqcom_bam_dma.h21 * Setting to 0 ensures 32-bit addressing compatibility.
61 bam_ce->mask = cpu_to_le32(0x0); /* 32-bit addressing */ in bam_prep_ce_le32()
/linux/arch/arm/include/asm/
H A Ddomain.h27 * addressing. In such cases, we want to map system memory with
30 * 36-bit addressing and supersections are only available on
/linux/drivers/media/pci/mgb4/
H A Dmgb4_i2c.c7 * chips on the GMSL module use 16b addressing, the FPDL3 chips use standard
8 * 8b addressing.
/linux/arch/x86/platform/efi/
H A Defi_32.c14 * supports physical mode addressing on SoftSDV. This is to be fixed
62 * To make EFI call EFI runtime service in physical addressing mode we need
/linux/Documentation/networking/device_drivers/ethernet/google/
H A Dgve.rst55 Addressing Mode
57 GVE supports two addressing modes: QPL and RDA.
61 For RDA ("raw DMA addressing") mode, the set of pages is dynamic.
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dgen-hyprel.c11 * If the compiler used absolute addressing, those addresses need to
360 * Static relocations that generate PC-relative-addressing are ignored.
383 * Data relocations to generate absolute addressing. in emit_rela_section()
398 /* Allow relocations to generate PC-relative addressing. */ in emit_rela_section()
/linux/drivers/memory/
H A Djedec_ddr_data.c3 * DDR addressing details and AC timing parameters from JEDEC specs
14 /* LPDDR2 addressing details from JESD209-2 section 2.4 */

12345678910>>...17