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/linux/Documentation/devicetree/bindings/iio/adc/
H A Drenesas,rzn1-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rzn1-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
14 can use up to two internal ADC cores (ADC1 and ADC2) those internal cores are
20 - const: renesas,r9a06g032-adc # RZ/N1D
21 - const: renesas,rzn1-adc
28 - description: APB internal bus clock
29 - description: ADC clock
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/linux/drivers/iio/adc/
H A Drzn1-adc.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2025 Schneider-Electric
10 * ADC2 cores. The driver use ADC1 and/or ADC2 cores depending on the presence
11 * of the related power supplies (AVDD and VREF) description in the device-tree.
53 #define RZN1_ADC_NO_CHANNEL -1
127 int adc2_vref_mV; /* ADC2 Vref in mV. Negative if ADC2 is not used */
135 rzn1_adc->regs + RZN1_ADC_CONFIG_REG); in rzn1_adc_power()
138 return readl_poll_timeout_atomic(rzn1_adc->regs + RZN1_ADC_CONTROL_REG, in rzn1_adc_power()
156 writel(vc, rzn1_adc->regs + RZN1_ADC_VC_REG(ch)); in rzn1_adc_vc_setup_conversion()
163 val = readl(rzn1_adc->regs + RZN1_ADC_FORCE_REG); in rzn1_adc_vc_start_conversion()
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H A Dstm32-adc-core.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
17 * STM32 - ADC global register map
20 * --------------------------------------------------------
22 * --------------------------------------------------------
23 * | 0x100 | Slave ADC2 |
24 * --------------------------------------------------------
26 * --------------------------------------------------------
28 * --------------------------------------------------------
35 /* STM32F4 - Registers for each ADC instance */
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/linux/sound/soc/codecs/
H A Drt5677.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5677.c -- RT5677 ALSA SoC audio codec driver
29 #include <sound/soc-dapm.h>
35 #include "rt5677-spi.h"
552 * rt5677_dsp_mode_i2c_write_addr - Write value to address on DSP mode.
563 struct snd_soc_component *component = rt5677->componen in rt5677_dsp_mode_i2c_write_addr()
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H A Drt5665.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver
26 #include <sound/soc-dapm.h>
884 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
885 static const DECLARE_TLV_DB_SCALE(mono_vol_tlv, -1400, 150, 0);
886 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -465
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H A Dcs53l30.h1 /* SPDX-License-Identifier: GPL-2.0-only */
53 #define CS53L30_ADCDMIC2_CTL1 0x2D /* ADC2/DMIC2 Control 1. */
54 #define CS53L30_ADCDMIC2_CTL2 0x2E /* ADC2/DMIC2 Control 2. */
55 #define CS53L30_ADC2_CTL3 0x2F /* ADC2 Control 3. */
56 #define CS53L30_ADC2_NG_CTL 0x30 /* ADC2 Noise Gate Control. */
68 #define CS53L30_ASP_TDMTX_ENx(x) (CS53L30_ASP_TDMTX_EN6 - (x))
83 /* R6 (0x06) CS53L30_PWRCTL - Power Control */
99 /* R7 (0x07) CS53L30_MCLKCTL - MCLK Control */
111 #define CS53L30_MCLK_DIV_MASK (((1 << CS53L30_MCLK_DIV_WIDTH) - 1) << CS53L30_MCLK_DIV_SHIFT)
121 /* R8 (0x08) CS53L30_INT_SR_CTL - Internal Sample Rate Control */
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H A Dmsm8916-wcd-analog.c1 // SPDX-License-Identifier: GPL-2.0
109 #define MICB_VOLTAGE_REGVAL(v) (((v - MICB_MIN_VAL)/MICB_STEP_SIZE) << 3)
283 "vdd-cdc-io",
284 "vdd-cdc-tx-rx-cx",
322 /* ADC2 MUX */
337 "ADC2 MUX Mux", adc2_enum);
344 SOC_SINGLE_TLV("ADC2 Volume", CDC_A_TX_2_EN, 3, 8, 0, analog_gain),
358 if (wcd->micbias_mv) { in pm8916_wcd_analog_micbias_enable()
361 MICB_VOLTAGE_REGVAL(wcd->micbias_mv)); in pm8916_wcd_analog_micbias_enable()
366 if (wcd->micbias_mv >= 2700) in pm8916_wcd_analog_micbias_enable()
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H A Dak4619.c1 // SPDX-License-Identifier: GPL-2.0
3 * ak4619.c -- Asahi Kasei ALSA SoC Audio driver
37 #define LADC2 0x08 /* ADC2 Lch Digital Volume */
38 #define RADC2 0x09 /* ADC2 Rch Digital Volume */
47 #define DAC_DEMP 0x13 /* DAC De-Emphasis Setting */
126 /* DAC De-Emphasis Setting */
165 * min : 0xFE : -115.
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H A Drt5645.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5645.c -- RT5645 ALSA SoC audio codec driver
26 #include <sound/soc-dapm.h>
41 static unsigned int quirk = -1;
439 /* Some (package) variants have the headset-mic pin not-connecte
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H A Dwcd939x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
25 #include <sound/soc-dapm.h>
30 #include "wcd-clsh-v2.h"
31 #include "wcd-common.h"
32 #include "wcd-mbhc-v2.h"
215 "vdd-rxtx", "vdd-io", "vdd-buck", "vdd-mic-bias", "vdd-px",
218 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
422 port_num = ch_info->port_num; in wcd939x_sdw_connect_port()
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H A Dmsm8916-wcd-digital.c1 // SPDX-License-Identifier: GPL-2.0
251 "ZERO", "ADC1", "ADC2", "ADC3", "DMIC1", "DMIC2"
331 /* Digital Gain control -84 dB to +40 dB in 1 dB steps */
332 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
334 /* Cutoff Freq for High Pass Filter at -3dB */
360 snd_soc_dapm_to_component(w->dapm); in msm8x16_wcd_codec_set_iir_gain()
365 if (w->shif in msm8x16_wcd_codec_set_iir_gain()
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H A Dcs530x.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2024-2025 Cirrus Logic, Inc. and
26 "vdd-a",
27 "vdd-io",
136 struct regmap *regmap = cs530x->regmap; in cs530x_put_volsw_vu()
154 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1270, 50, 0);
157 "Min Phase Slow Roll-off",
158 "Min Phase Fast Roll-off",
159 "Linear Phase Slow Roll-off",
160 "Linear Phase Fast Roll-off",
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H A Dwcd937x.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
19 #include <sound/soc-dapm.h>
23 #include "wcd-clsh-v2.h"
24 #include "wcd-common.h"
25 #include "wcd-mbhc-v2.h"
112 "vdd-rxtx", "vdd-px", "vdd-mic-bias", "vdd-buck",
115 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
211 regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0, 0); in wcd937x_handle_post_irq()
212 regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1, 0); in wcd937x_handle_post_irq()
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H A Dwcd938x.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
20 #include <sound/soc-dapm.h>
24 #include "wcd-clsh-v2.h"
25 #include "wcd-common.h"
26 #include "wcd-mbhc-v2.h"
184 "vdd-rxtx", "vdd-io", "vdd-buck", "vdd-mic-bias",
187 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
188 static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, 0);
344 struct regmap *rm = wcd938x->regmap; in wcd938x_io_init()
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H A Dak4613.c1 // SPDX-License-Identifier: GPL-2.0
3 // ak4613.c -- Asahi Kasei ALSA Soc Audio driver
14 * +-------+
16 * SDTO1 <-| |
18 * SDTI1 ->| |
19 * SDTI2 ->| |
20 * SDTI3 ->| |
21 * +-------+
23 * +---+
68 * +-----+ +-----------+
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H A Drk3308_codec.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Rockchip RK3308 internal audio codec driver -- register definitions
6 * Copyright (c) 2022, Vivax-Metrotech Ltd
19 * CH0: left_0(ADC1) and right_0(ADC2)
74 * CH0: left_0(ADC1) and right_0(ADC2)
112 /* RK3308_GLB_CON - REG: 0x0000 */
121 /* RK3308_ADC_DIG_CON01 - REG: 0x0004 */
138 /* RK3308_ADC_DIG_CON02 - REG: 0x0008 */
150 /* RK3308_ADC_DIG_CON03 - REG: 0x000c */
164 /* RK3308_ADC_DIG_CON04 - REG: 0x0010 */
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H A Drt5640.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
27 #include <sound/soc-dapm.h>
340 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
341 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
342 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -345
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H A Dlpass-tx-macro.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <sound/soc-dapm.h>
15 #include <linux/clk-provider.h>
17 #include "lpass-macro-common.h"
201 #define TX_ADC_TO_DMIC(n) ((n - TX_ADC_MA
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/linux/sound/firewire/dice/
H A Ddice-weiss.c1 // SPDX-License-Identifier: GPL-2.0
2 // dice-weiss.c - a part of driver for DICE based devices
13 // Weiss DAC202: 192kHz 2-channel DAC
19 // Weiss MAN301: 192kHz 2-channel music archive network player
25 // Weiss INT202: 192kHz unidirectional 2-channel digital Firewire nterface
31 // Weiss INT203: 192kHz bidirectional 2-channel digital Firewire nterface
37 // Weiss ADC2: 192kHz A/D converter with microphone preamps and line nputs
38 static const struct dice_weiss_spec adc2 = { variable
43 // Weiss DAC2/Minerva: 192kHz 2-channel DAC
49 // Weiss Vesta: 192kHz 2-channel Firewire to AES/EBU interface
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
20 /delete-property/ mmc2;
26 compatible = "gpio-beeper";
31 stdout-path = &uart6;
34 gpio_buttons: gpio-keys {
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2600-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2600-scu", "syscon", "simple-mfd"
29 const: aspeed,ast2600-pinctrl
32 $ref: pinmux-node.yaml#
38 - ADC0
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H A Daspeed,ast2400-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2400-scu", "syscon", "simple-mfd"
24 const: aspeed,ast2400-pinctrl
29 $ref: pinmux-node.yaml#
34 bias-disable: true
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H A Daspeed,ast2500-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
29 aspeed,external-nodes:
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/linux/drivers/mfd/
H A Dwm8994-regmap.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8994-regmap.c -- Register map data for WM8994 series devices
18 { 0x0001, 0x0000 }, /* R1 - Power Management (1) */
19 { 0x0002, 0x6000 }, /* R2 - Power Management (2) */
20 { 0x0003, 0x0000 }, /* R3 - Power Management (3) */
21 { 0x0004, 0x0000 }, /* R4 - Power Management (4) */
22 { 0x0005, 0x0000 }, /* R5 - Power Management (5) */
23 { 0x0006, 0x0000 }, /* R6 - Power Management (6) */
24 { 0x0015, 0x0000 }, /* R21 - Input Mixer (1) */
25 { 0x0018, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
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/linux/include/dt-bindings/clock/
H A Dstm32mp13-clks.h1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
3 * Copyright (C) STMicroelectronics 2020 - All Rights Reserved
192 #define ADC2 159 macro

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