Lines Matching +full:adc2 +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <sound/soc-dapm.h>
15 #include <linux/clk-provider.h>
17 #include "lpass-macro-common.h"
201 #define TX_ADC_TO_DMIC(n) ((n - TX_ADC_MAX)/2)
291 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
616 struct regmap *regmap = tx->regmap;
619 if (tx->tx_mclk_users == 0) {
631 tx->tx_mclk_users++;
633 if (tx->tx_mclk_users <= 0) {
634 dev_err(tx->dev, "clock already disabled\n");
635 tx->tx_mclk_users = 0;
638 tx->tx_mclk_users--;
639 if (tx->tx_mclk_users == 0) {
658 if (tx->data->ver > LPASS_VER_9_0_0)
683 tx = hpf_work->tx;
684 component = tx->component;
685 hpf_cut_off_freq = hpf_work->hpf_cut_off_freq;
687 dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator);
688 hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator);
690 if (is_amic_enabled(component, tx, hpf_work->decimator)) {
726 tx = tx_mute_dwork->tx;
727 component = tx->component;
728 decimator = tx_mute_dwork->decimator;
737 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
784 if (widget->shift) {
804 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm);
805 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
810 val = ucontrol->value.enumerated.item[0];
811 if (val >= e->items)
812 return -EINVAL;
814 switch (e->reg) {
840 dev_err(component->dev, "Error in configuration!!\n");
841 return -EINVAL;
845 if (widget->shift) /* MSM DMIC */
848 else if (tx->data->ver <= LPASS_VER_9_0_0)
863 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm);
864 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
865 u32 dai_id = widget->shift;
866 u32 dec_id = mc->shift;
869 if (test_bit(dec_id, &tx->active_ch_mask[dai_id]))
870 ucontrol->value.integer.value[0] = 1;
872 ucontrol->value.integer.value[0] = 0;
881 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm);
883 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value;
884 u32 dai_id = widget->shift;
885 u32 dec_id = mc->shift;
886 u32 enable = ucontrol->value.integer.value[0];
890 if (tx->active_decimator[dai_id] == dec_id)
893 set_bit(dec_id, &tx->active_ch_mask[dai_id]);
894 tx->active_ch_cnt[dai_id]++;
895 tx->active_decimator[dai_id] = dec_id;
897 if (tx->active_decimator[dai_id] == -1)
900 tx->active_ch_cnt[dai_id]--;
901 clear_bit(dec_id, &tx->active_ch_mask[dai_id]);
902 tx->active_decimator[dai_id] = -1;
904 snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update);
912 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
922 decimator = w->shift;
946 tx->dec_mode[decimator]);
962 tx->tx_hpf_work[decimator].hpf_cut_off_freq =
976 &tx->tx_mute_dwork[decimator].dwork,
978 if (tx->tx_hpf_work[decimator].hpf_cut_off_freq != CF_MIN_3DB_150HZ) {
980 &tx->tx_hpf_work[decimator].dwork,
1005 if (tx->bcs_enable) {
1008 tx->bcs_clk_en = true;
1013 tx->tx_hpf_work[decimator].hpf_cut_off_freq;
1017 &tx->tx_hpf_work[decimator].dwork)) {
1047 cancel_delayed_work_sync(&tx->tx_mute_dwork[decimator].dwork);
1056 if (tx->bcs_enable) {
1063 tx->bcs_clk_en = false;
1075 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1076 int path = e->shift_l;
1078 ucontrol->value.integer.value[0] = tx->dec_mode[path];
1087 int value = ucontrol->value.integer.value[0];
1088 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1089 int path = e->shift_l;
1092 if (tx->dec_mode[path] == value)
1095 tx->dec_mode[path] = value;
1106 ucontrol->value.integer.value[0] = tx->bcs_enable;
1115 int value = ucontrol->value.integer.value[0];
1118 tx->bcs_enable = value;
1127 struct snd_soc_component *component = dai->component;
1157 dev_err(component->dev, "%s: Invalid TX sample rate: %d\n",
1159 return -EINVAL;
1162 for_each_set_bit(decimator, &tx->active_ch_mask[dai->id], TX_MACRO_DEC_MAX)
1173 struct snd_soc_component *component = dai->component;
1176 switch (dai->id) {
1180 *tx_slot = tx->active_ch_mask[dai->id];
1181 *tx_num = tx->active_ch_cnt[dai->id];
1191 struct snd_soc_component *component = dai->component;
1196 if (tx->active_decimator[dai->id] == -1)
1199 decimator = tx->active_decimator[dai->id];
1642 "ZERO", "ADC0", "ADC1", "ADC2", "ADC3", "SWR_DMIC0",
1717 {"TX SMIC MUX0", "ADC2", "TX SWR_ADC2"},
1732 {"TX SMIC MUX1", "ADC2", "TX SWR_ADC2"},
1747 {"TX SMIC MUX2", "ADC2", "TX SWR_ADC2"},
1762 {"TX SMIC MUX3", "ADC2", "TX SWR_ADC2"},
1777 {"TX SMIC MUX4", "ADC2", "TX SWR_ADC2"},
1792 {"TX SMIC MUX5", "ADC2", "TX SWR_ADC2"},
1807 {"TX SMIC MUX6", "ADC2", "TX SWR_ADC2"},
1822 {"TX SMIC MUX7", "ADC2", "TX SWR_ADC2"},
2031 -84, 40, digital_gain),
2034 -84, 40, digital_gain),
2037 -84, 40, digital_gain),
2040 -84, 40, digital_gain),
2043 -84, 40, digital_gain),
2046 -84, 40, digital_gain),
2049 -84, 40, digital_gain),
2052 -84, 40, digital_gain),
2088 if (tx->data->extra_widgets_num) {
2089 ret = snd_soc_dapm_new_controls(dapm, tx->data->extra_widgets,
2090 tx->data->extra_widgets_num);
2092 dev_err(tx->dev, "failed to add extra widgets: %d\n", ret);
2097 if (tx->data->extra_routes_num) {
2098 ret = snd_soc_dapm_add_routes(dapm, tx->data->extra_routes,
2099 tx->data->extra_routes_num);
2101 dev_err(tx->dev, "failed to add extra routes: %d\n", ret);
2118 snd_soc_component_init_regmap(comp, tx->regmap);
2121 tx->tx_hpf_work[i].tx = tx;
2122 tx->tx_hpf_work[i].decimator = i;
2123 INIT_DELAYED_WORK(&tx->tx_hpf_work[i].dwork,
2128 tx->tx_mute_dwork[i].tx = tx;
2129 tx->tx_mute_dwork[i].decimator = i;
2130 INIT_DELAYED_WORK(&tx->tx_mute_dwork[i].dwork,
2133 tx->component = comp;
2149 struct regmap *regmap = tx->regmap;
2152 ret = clk_prepare_enable(tx->mclk);
2154 dev_err(tx->dev, "failed to enable mclk\n");
2169 struct regmap *regmap = tx->regmap;
2175 clk_disable_unprepare(tx->mclk);
2183 regmap_read(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, &val);
2205 struct device *dev = tx->dev;
2207 const char *clk_name = "lpass-tx-mclk";
2212 if (tx->npl)
2213 parent_clk_name = __clk_get_name(tx->npl);
2215 parent_clk_name = __clk_get_name(tx->mclk);
2222 tx->hw.init = &init;
2223 hw = &tx->hw;
2232 .name = "TX-MACRO",
2244 struct device *dev = &pdev->dev;
2245 struct device_node *np = dev->of_node;
2252 return -ENOMEM;
2254 tx->data = device_get_match_data(dev);
2256 tx->macro = devm_clk_get_optional(dev, "macro");
2257 if (IS_ERR(tx->macro))
2258 return dev_err_probe(dev, PTR_ERR(tx->macro), "unable to get macro clock\n");
2260 tx->dcodec = devm_clk_get_optional(dev, "dcodec");
2261 if (IS_ERR(tx->dcodec))
2262 return dev_err_probe(dev, PTR_ERR(tx->dcodec), "unable to get dcodec clock\n");
2264 tx->mclk = devm_clk_get(dev, "mclk");
2265 if (IS_ERR(tx->mclk))
2266 return dev_err_probe(dev, PTR_ERR(tx->mclk), "unable to get mclk clock\n");
2268 if (tx->data->flags & LPASS_MACRO_FLAG_HAS_NPL_CLOCK) {
2269 tx->npl = devm_clk_get(dev, "npl");
2270 if (IS_ERR(tx->npl))
2271 return dev_err_probe(dev, PTR_ERR(tx->npl), "unable to get npl clock\n");
2274 tx->fsgen = devm_clk_get(dev, "fsgen");
2275 if (IS_ERR(tx->fsgen))
2276 return dev_err_probe(dev, PTR_ERR(tx->fsgen), "unable to get fsgen clock\n");
2278 tx->pds = lpass_macro_pds_init(dev);
2279 if (IS_ERR(tx->pds))
2280 return PTR_ERR(tx->pds);
2289 if (of_device_is_compatible(np, "qcom,sc7280-lpass-tx-macro")) {
2302 tx->regmap = devm_regmap_init_mmio(dev, base, &tx_regmap_config);
2303 if (IS_ERR(tx->regmap)) {
2304 ret = PTR_ERR(tx->regmap);
2310 tx->dev = dev;
2313 tx->active_decimator[TX_MACRO_AIF1_CAP] = -1;
2314 tx->active_decimator[TX_MACRO_AIF2_CAP] = -1;
2315 tx->active_decimator[TX_MACRO_AIF3_CAP] = -1;
2318 clk_set_rate(tx->mclk, MCLK_FREQ);
2319 clk_set_rate(tx->npl, MCLK_FREQ);
2321 ret = clk_prepare_enable(tx->macro);
2325 ret = clk_prepare_enable(tx->dcodec);
2329 ret = clk_prepare_enable(tx->mclk);
2333 ret = clk_prepare_enable(tx->npl);
2337 ret = clk_prepare_enable(tx->fsgen);
2343 if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR)
2344 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
2347 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
2351 if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR)
2352 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
2374 clk_disable_unprepare(tx->fsgen);
2376 clk_disable_unprepare(tx->npl);
2378 clk_disable_unprepare(tx->mclk);
2380 clk_disable_unprepare(tx->dcodec);
2382 clk_disable_unprepare(tx->macro);
2384 lpass_macro_pds_exit(tx->pds);
2391 struct tx_macro *tx = dev_get_drvdata(&pdev->dev);
2393 clk_disable_unprepare(tx->macro);
2394 clk_disable_unprepare(tx->dcodec);
2395 clk_disable_unprepare(tx->mclk);
2396 clk_disable_unprepare(tx->npl);
2397 clk_disable_unprepare(tx->fsgen);
2399 lpass_macro_pds_exit(tx->pds);
2406 regcache_cache_only(tx->regmap, true);
2407 regcache_mark_dirty(tx->regmap);
2409 clk_disable_unprepare(tx->fsgen);
2410 clk_disable_unprepare(tx->npl);
2411 clk_disable_unprepare(tx->mclk);
2421 ret = clk_prepare_enable(tx->mclk);
2427 ret = clk_prepare_enable(tx->npl);
2433 ret = clk_prepare_enable(tx->fsgen);
2439 regcache_cache_only(tx->regmap, false);
2440 regcache_sync(tx->regmap);
2444 clk_disable_unprepare(tx->npl);
2446 clk_disable_unprepare(tx->mclk);
2502 .compatible = "qcom,sc7280-lpass-tx-macro",
2505 .compatible = "qcom,sm6115-lpass-tx-macro",
2508 .compatible = "qcom,sm8250-lpass-tx-macro",
2511 .compatible = "qcom,sm8450-lpass-tx-macro",
2514 .compatible = "qcom,sm8550-lpass-tx-macro",
2517 .compatible = "qcom,sc8280xp-lpass-tx-macro",