| /linux/Documentation/devicetree/bindings/access-controllers/ |
| H A D | access-controllers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic Domain Access Controllers
10 - Oleksii Moisieiev <oleksii_moisieiev@epam.com>
13 Common access controllers properties
15 Access controllers are in charge of stating which of the hardware blocks under
18 or a group of hardware blocks. An access controller's domain is the set of
19 resources covered by the access controller.
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
56 one 64 bits parallel access. Typically used with SDR, DDR, DDR2 and DDR3
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
63 dimms, accessed at the same time. E. g. if the DIMM is 64 bits-wide (72
65 access.
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | st,stm32mp25-omm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 The STM32 Octo Memory Manager is a low-level interface that enables an
17 - Two single/dual/quad/octal SPI interfaces
18 - Two ports for pin assignment
22 const: st,stm32mp25-omm
24 "#address-cells":
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| H A D | intel,ixp4xx-expansion-bus-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The IXP4xx expansion bus controller handles access to devices on the
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linusw@kernel.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
24 - intel,ixp42x-expansion-bus-controller
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| H A D | st,stm32-fmc2-ebi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
19 Select. The FMC2 performs only one access at a time to an external device.
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
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| H A D | arm,pl172.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl172.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
18 - arm,pl172
19 - arm,pl175
20 - arm,pl176
22 - compatible
27 - enum:
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| /linux/Documentation/admin-guide/ |
| H A D | cgroup-v2.rst | 1 .. _cgroup-v2:
11 conventions of cgroup v2. It describes all userland-visible aspects
14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
22 1-1. Terminology
23 1-2. What is cgroup?
25 2-1. Mounting
26 2-2. Organizing Processes and Threads
27 2-2-1. Processes
28 2-2-2. Threads
29 2-3. [Un]populated Notification
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | st,stm32mp25-ospi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 - $ref: spi-controller.yaml#
17 const: st,stm32mp25-ospi
22 memory-region:
24 Memory region to be used for memory-map read access.
25 In memory-mapped mode, read access are performed from the memory
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| /linux/Documentation/gpu/ |
| H A D | tegra.rst | 11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
52 .. kernel-doc:: drivers/gpu/host1x/bus.c
56 --------------------------
58 .. kernel-doc:: drivers/gpu/host1x/syncpt.c
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| /linux/Documentation/core-api/ |
| H A D | debugging-via-ohci1394.rst | 2 Using physical DMA provided by OHCI-1394 FireWire controllers for debugging
6 ------------
8 Basically all FireWire controllers which are in use today are compliant
9 to the OHCI-1394 specification which defines the controller to be a PCI
12 PCI-Bus master DMA after applying filters defined by the OHCI-1394 driver.
15 ask the OHCI-1394 controller to perform read and write requests on
25 With most FireWire controllers, memory access is limited to the low 4 GB
28 hardware such as x86, x86-64 and PowerPC.
30 At least LSI FW643e and FW643e2 controllers are known to support access to
34 Together with a early initialization of the OHCI-1394 controller for debugging,
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| /linux/drivers/usb/gadget/udc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
20 # The order here is alphabetical, except that integrated controllers go
22 # - integrated/SOC controllers first
23 # - licensed IP used in both SOC and discrete versions
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| /linux/include/sound/ac97/ |
| H A D | controller.h | 1 /* SPDX-License-Identifier: GPL-2.0
18 * struct ac97_controller - The AC97 controller of the AC-Link
20 * @controllers: linked list of all existing controllers.
21 * @adap: the shell device ac97-%d, ie. ac97 adapter
29 * controllers themselves, excepting for using @dev.
33 struct list_head controllers; member
43 * struct ac97_controller_ops - The AC97 operations
44 * @reset: Cold reset of the AC97 AC-Link.
45 * @warm_reset: Warm reset of the AC97 AC-Link.
51 * access functions. Amongst these, all but the last 2 are mandatory.
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| /linux/drivers/usb/usbip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
10 machines direct access to USB devices. It provides the
17 be called usbip-core.
29 module will be called vhci-hcd.
42 int "Number of USB/IP virtual host controllers"
49 virtual host controllers as if adding physical host
50 controllers.
60 module will be called usbip-host.
71 module will be called usbip-vudc.
|
| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic7xxx_osm_pci.c | 2 * Linux driver attachment glue for PCI based controllers.
4 * Copyright (c) 2000-2001 Adaptec Inc.
18 * 3. Neither the names of the above-listed copyright holders nor the names
50 /* aic7850 based controllers */
52 /* aic7860 based controllers */
58 /* aic7870 based controllers */
65 /* aic7880 based controllers */
75 /* aic7890 based controllers */
83 /* aic7890 based controllers */
91 /* aic7892 based controllers */
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| /linux/drivers/iommu/ |
| H A D | exynos-iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/dma-mapping.h>
25 #include "dma-iommu.h"
26 #include "iommu-pages.h"
41 #define SECT_MASK (~(SECT_SIZE - 1))
42 #define LPAGE_MASK (~(LPAGE_SIZE - 1))
43 #define SPAGE_MASK (~(SPAGE_SIZE - 1))
58 * v1.x - v3.x SYSMMU supports 32bit physical and 32bit virtual address spaces
61 * All SYSMMU controllers in the system support the address spaces of the same
65 static short PG_ENT_SHIFT = -1;
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| /linux/drivers/firewire/ |
| H A D | init_ohci1394_dma.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * init_ohci1394_dma.c - Initializes physical DMA on all OHCI 1394 controllers
5 * Copyright (C) 2006-2007 Bernhard Kaindl <bk@suse.de>
7 * Derived from drivers/ieee1394/ohci1394.c and arch/x86/kernel/early-quirks.c
9 * - scan the PCI very early on boot for all OHCI 1394-compliant controllers
10 * - reset and initialize them and make them join the IEEE1394 bus and
11 * - enable physical DMA on them to allow remote debugging
14 * during boot, all OHCI1394 controllers may be claimed by the firewire
18 * be sure that the stack enables it and (re-)attach after the bus reset
28 #include <asm/pci-direct.h> /* for direct PCI config space access */
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,mt8196-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
15 PLLs -->
16 dividers -->
18 -->
26 - enum:
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| H A D | mediatek,mt8196-sys-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
15 PLLs -->
16 dividers -->
18 -->
29 - enum:
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| /linux/Documentation/devicetree/bindings/fsi/ |
| H A D | fsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fsi/fsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
14 FSI bus is connected to a CFAM (Common FRU Access Macro) which contains
15 various engines such as I2C controllers, SPI controllers, etc.
18 "#address-cells":
21 "#size-cells":
24 '#interrupt-cells':
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| H A D | ibm,fsi2spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-or-later)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: IBM FSI-attached SPI controllers
10 - Eddie James <eajames@linux.ibm.com>
15 access to a number of SPI controllers.
20 - ibm,fsi2spi
24 - description: FSI slave address
26 "#address-cells":
29 "#size-cells":
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | pamu.txt | 1 Freescale Peripheral Management Access Unit (PAMU) Device Tree Binding
5 The PAMU is an I/O MMU that provides device-to-memory access control and
10 - compatible : <string>
11 First entry is a version-specific string, such as
12 "fsl,pamu-v1.0". The second is "fsl,pamu".
13 - ranges : <prop-encoded-array>
17 physically present PAMU controllers. For example, for
20 - interrupts : <prop-encoded-array>
22 interrupt, used for reporting access violations. The second
25 - #address-cells: <u32>
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-scsi_host | 7 Storage Control Unit embeds up to two 4-port controllers in
8 a single PCI device. The controllers are enumerated in order
19 feature of HP Smart Array RAID controllers using the hpsa
22 of a logical drive, bypassing the controllers firmware RAID
34 Contact: linux-ide@vger.kernel.org
60 a) It does not use host-initiated slumber mode, but it does
61 allow device-initiated slumber
68 Contact: linux-ide@vger.kernel.org
79 protocol that is being used by the driver (for eg. LED, SAF-TE,
80 SES-2, SGPIO etc).
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| /linux/Documentation/admin-guide/media/ |
| H A D | remote-controller.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Most analog and digital TV boards support remote controllers. Several of
22 the `v4l-utils <https://git.linuxtv.org/v4l-utils.git/>`_. It provides
23 two tools to handle remote controllers:
25 - ir-keytable: provides a way to query the remote controller, list the
26 protocols it supports, enable in-kernel support for IR decoder or
29 - ir-ctl: provide tools to handle remote controllers that support raw mode
32 Usually, the remote controller module is auto-loaded when the TV card is
34 ir-kbd-i2c module.
44 applications to access the remote via /dev/input/event<n> devices.
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| /linux/Documentation/scsi/ |
| H A D | ChangeLog.megaraid | 1 Release Date : Thu Nov 16 15:32:35 EST 2006 -
9 and re-initialize its internal RAID structure.
14 2. Authors email-id domain name changed from lsil.com to lsi.com.
17 Release Date : Fri May 19 09:31:45 EST 2006 - Seokmann Ju <sju@lsil.com>
23 Root Cause: the driver registered controllers as 64-bit DMA capable
26 identifying 64-bit DMA capable controllers.
28 > -----Original Message-----
31 > To: linux-scsi@vger.kernel.org; Kolli, Neela; Mukker, Atul;
41 > "attempt to access beyond end of device" messages.
73 > attempt to access beyond end of device
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| /linux/drivers/nvme/target/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 controllers and export Linux block devices as NVMe namespaces.
24 This enables debugfs support to display the connected controllers
36 directly access an actual NVMe controller residing on the target
83 to test NVMe-FC transport interfaces.
106 https://github.com/oracle/ktls-utils.
111 bool "NVMe over Fabrics In-band Authentication in target side"
115 This enables support for NVMe over Fabrics In-band Authentication in
|