| /linux/arch/riscv/boot/dts/andes/ |
| H A D | qilai.dtsi | 25 "zicntr", "zicsr", "zifencei",
50 "zicntr", "zicsr", "zifencei",
76 "zicntr", "zicsr", "zifencei",
102 "zicntr", "zicsr", "zifencei",
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| /linux/arch/riscv/boot/dts/sifive/ |
| H A D | fu540-c000.dtsi | 34 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
60 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
87 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
114 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
141 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
|
| H A D | fu740-c000.dtsi | 35 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
62 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
89 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
116 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
143 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
|
| /linux/arch/riscv/boot/dts/microchip/ |
| H A D | mpfs.dtsi | 27 riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei",
56 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
87 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
118 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
149 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
|
| /linux/Documentation/devicetree/bindings/riscv/ |
| H A D | extensions.yaml | 24 ratified states, with the exception of the I, Zicntr & Zihpm extensions.
38 Zicntr, Zicsr, Zifencei and Zihpm extensions and thus "i"
69 the Zicntr and Zihpm extensions after the ratification of the
606 - const: zicntr
608 The standard Zicntr extension for base counters and timers, as
625 special case read-only CSRs, that were moved into the Zicntr and
|
| /linux/arch/riscv/boot/dts/sophgo/ |
| H A D | cv180x-cpus.dtsi | 26 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
|
| /linux/arch/riscv/boot/dts/thead/ |
| H A D | th1520.dtsi | 28 "ziccrse", "zicntr", "zicsr",
55 "ziccrse", "zicntr", "zicsr",
82 "ziccrse", "zicntr", "zicsr",
109 "ziccrse", "zicntr", "zicsr",
|
| /linux/tools/testing/selftests/kvm/riscv/ |
| H A D | get-reg-list.c | 555 KVM_ISA_EXT_ARR(ZICNTR), in isa_ext_single_id_to_str()
1199 KVM_ISA_EXT_SIMPLE_CONFIG(zicntr, ZICNTR);
|
| /linux/Documentation/arch/riscv/ |
| H A D | hwprobe.rst | 186 * :c:macro:`RISCV_HWPROBE_EXT_ZICNTR`: The Zicntr extension version 2.0
|
| /linux/arch/riscv/kernel/ |
| H A D | sys_hwprobe.c | 130 EXT_KEY(isainfo->isa, ZICNTR, pair->value, missing); in hwprobe_isa_ext0()
|
| H A D | cpufeature.c | 510 __RISCV_ISA_EXT_DATA(zicntr, RISCV_ISA_EXT_ZICNTR),
|
| /linux/arch/riscv/kvm/ |
| H A D | vcpu_onereg.c | 78 KVM_ISA_EXT_ARR(ZICNTR),
|