Home
last modified time | relevance | path

Searched full:xilinx (Results 1 – 25 of 222) sorted by relevance

123456789

/freebsd/sys/arm/xilinx/
H A Dfiles.zynq75 arm/xilinx/zy7_machdep.c standard
6 arm/xilinx/zy7_l2cache.c standard
7 arm/xilinx/zy7_slcr.c standard
8 arm/xilinx/zy7_devcfg.c standard
9 arm/xilinx/zy7_mp.c optional smp
11 arm/xilinx/zy7_ehci.c optional ehci
12 arm/xilinx/uart_dev_cdnc.c optional uart
13 arm/xilinx/zy7_gpio.c optional gpio
14 arm/xilinx/zy7_qspi.c optional zy7_qspi
15 arm/xilinx/zy7_spi.c optional zy7_spi
H A Dzy7_machdep.c30 * Machine dependent code for Xilinx Zynq-7000 Soc.
33 * (v1.4) November 16, 2012. Xilinx doc UG585.
51 #include <arm/xilinx/zy7_machdep.h>
52 #include <arm/xilinx/zy7_reg.h>
/freebsd/sys/contrib/device-tree/Bindings/
H A Dxilinx.txt1 d) Xilinx IP cores
3 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
4 in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
89 That covers the general approach to binding xilinx IP cores into the
92 i) Xilinx ML300 Framebuffer
105 ii) Xilinx SystemACE
107 The Xilinx SystemACE device is used to program FPGAs from an FPGA
114 iii) Xilinx EMAC and Xilinx TEMAC
116 Xilinx Ethernet devices. In addition to general xilinx properties
121 iv) Xilinx Uartlite
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/xilinx/
H A Dxilinx.yaml4 $id: http://devicetree.org/schemas/soc/xilinx/xilinx.yaml#
7 title: Xilinx Zynq Platforms
13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
52 - description: Xilinx internal board zc1232
58 - description: Xilinx internal board zc1254
64 - description: Xilinx evaluation board zcu1275
70 - description: Xilinx 96boards compatible board zcu100
76 - description: Xilinx 96boards compatible board Ultra96
84 - description: Xilinx evaluation board zcu102
94 - description: Xilinx evaluation board zcu104
[all …]
H A Dxlnx,vcu-settings.yaml4 $id: http://devicetree.org/schemas/soc/xilinx/xlnx,vcu-settings.yaml#
7 title: Xilinx VCU Settings
13 The Xilinx VCU Settings provides information about the configuration of the
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dxilinx.yaml4 $id: http://devicetree.org/schemas/arm/xilinx.yaml#
7 title: Xilinx Zynq Platforms
13 Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
52 - description: Xilinx internal board zc1232
58 - description: Xilinx internal board zc1254
64 - description: Xilinx evaluation board zcu1275
70 - description: Xilinx 96boards compatible board zcu100
76 - description: Xilinx 96boards compatible board Ultra96
84 - description: Xilinx evaluation board zcu102
94 - description: Xilinx evaluation board zcu104
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dxilinx3 # $File: xilinx,v 1.12 2024/09/04 19:06:12 christos Exp $
4 # This is Aaron's attempt at a MAGIC file for Xilinx .bit files.
5 # Xilinx-Magic@RevRagnarok.com
18 >>>>>&3 string a Xilinx BIT data
40 >&0 belong 0xaa995566 Xilinx RAW bitstream (.BIN)
42 # AXLF (xclbin) files used by AMD/Xilinx accelerators.
44 # https://github.com/Xilinx/XRT/blob/master/src/runtime_src/core/include/xclbin.h
48 0 string xclbin2 AMD/Xilinx accelerator AXLF (xclbin) file
60 # Xilinx Boot Image files
61 # File format spec is from Xilinx UG1283
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dxilinx-xadc.txt1 Xilinx XADC device driver
3 This binding document describes the bindings for the Xilinx 7 Series XADC as well
6 The Xilinx XADC is an ADC that can be found in the Series 7 FPGAs from Xilinx.
14 The Xilinx System Monitor is an ADC that is found in the UltraScale and
15 UltraScale+ FPGAs from Xilinx. The System Monitor provides a DRP interface for
16 communication. Xilinx provides a standard IP core that can be used to access the
18 called the Xilinx System Management Wizard. This document describes the bindings
28 Xilinx System Management Wizard fabric IP core to access the
/freebsd/sys/contrib/device-tree/Bindings/mailbox/
H A Dxlnx,zynqmp-ipi-mailbox.yaml7 title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
10 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
15 | Xilinx ZynqMP IPI Controller |
32 | Xilinx IPI Agent Block |
71 Remote Xilinx IPI agent ID of which the mailbox is connected to.
101 Remote Xilinx IPI agent ID of which the mailbox is connected to.
H A Dxlnx,zynqmp-ipi-mailbox.txt1 Xilinx IPI Mailbox Controller
4 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
5 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
9 | Xilinx ZynqMP IPI Controller |
26 | Xilinx IPI Agent Block |
39 - xlnx,ipi-id: local Xilinx IPI agent ID
60 - xlnx,ipi-id: remote Xilinx IPI agent ID of which the mailbox is
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxilinx-slave-serial.txt1 Xilinx Slave Serial SPI FPGA Manager
3 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the
9 - https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
10 - https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
11 - https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
H A Dxlnx,fpga-slave-serial.yaml7 title: Xilinx Slave Serial SPI FPGA
13 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
19 https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
20 https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
21 https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
H A Dxlnx,pr-decoupler.yaml7 title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
16 The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
21 Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
22 is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
H A Dxilinx-pr-decoupler.txt1 Xilinx LogiCORE Partial Reconfig Decoupler Softcore
3 The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more
10 Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager
11 Softcore is compatible with the Xilinx LogiCORE pr-decoupler.
/freebsd/sys/arm64/conf/
H A DXILINX2 # XILINX -- Xilinx kernel configuration file for FreeBSD/arm64
23 ident XILINX
27 include "std.xilinx"
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zc1275-revA.dts3 * dts file for Xilinx ZynqMP ZC1275
5 * (C) Copyright 2017 - 2021, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/
H A Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
18 The following properties are common to all Xilinx video IP cores.
35 [UG934] https://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_vi…
H A Dxlnx,video.txt1 Xilinx Video IP Pipeline (VIPP)
7 Xilinx video IP pipeline processes video streams through one or more Xilinx
/freebsd/sys/arm/conf/
H A DZEDBOARD2 # ZEDBOARD -- Custom configuration for the Xilinx Zynq-7000 based
24 include "../xilinx/std.zynq7"
70 device zy7_qspi # Xilinx Zynq QSPI controller
71 device zy7_spi # Xilinx Zynq SPI controller
/freebsd/sys/contrib/device-tree/include/dt-bindings/media/
H A Dxilinx-vip.h3 * Xilinx Video IP Core
6 * Copyright (C) 2013-2015 Xilinx, Inc.
8 * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-zc770-xm011.dts3 * Xilinx ZC770 XM011 board DTS
5 * Copyright (C) 2013-2018 Xilinx, Inc.
11 model = "Xilinx ZC770 XM011 board";
H A Dzynq-zc770-xm012.dts3 * Xilinx ZC770 XM012 board DTS
5 * Copyright (C) 2013-2018 Xilinx, Inc.
11 model = "Xilinx ZC770 XM012 board";
H A Dzynq-cc108.dts3 * Xilinx CC108 board DTS
5 * (C) Copyright 2007-2018 Xilinx, Inc.
15 model = "Xilinx CC108 board";
H A Dzynq-zc770-xm013.dts3 * Xilinx ZC770 XM013 board DTS
5 * Copyright (C) 2013 Xilinx, Inc.
11 model = "Xilinx ZC770 XM013 board";
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dcdns,macb.yaml23 - cdns,zynq-gem # Xilinx Zynq-7xxx SoC
24 - cdns,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC
30 - xlnx,versal-gem # Xilinx Versal
31 - xlnx,zynq-gem # Xilinx Zynq-7xxx SoC
32 - xlnx,zynqmp-gem # Xilinx Zynq Ultrascale+ MPSoC

123456789