| /linux/Documentation/driver-api/md/ |
| H A D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean
27 and parity don't match. The reason is that a stripe write involves several RAID
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| /linux/tools/testing/selftests/net/ |
| H A D | proc_net_pktgen.c | 127 len = write(self->thr_fd, thr_cmd_add_loopback_0, sizeof(thr_cmd_add_loopback_0)); in FIXTURE_SETUP()
141 len = write(self->thr_fd, thr_cmd_rm_loopback_0, sizeof(thr_cmd_rm_loopback_0)); in FIXTURE_TEARDOWN()
155 len = write(self->ctrl_fd, wrong_ctrl_cmd, i); in TEST_F()
164 len = write(self->ctrl_fd, ctrl_cmd_stop, sizeof(ctrl_cmd_stop)); in TEST_F()
167 len = write(self->ctrl_fd, ctrl_cmd_stop, sizeof(ctrl_cmd_stop) - 1); in TEST_F()
170 len = write(self->ctrl_fd, ctrl_cmd_start, sizeof(ctrl_cmd_start)); in TEST_F()
173 len = write(self->ctrl_fd, ctrl_cmd_start, sizeof(ctrl_cmd_start) - 1); in TEST_F()
176 len = write(self->ctrl_fd, ctrl_cmd_reset, sizeof(ctrl_cmd_reset)); in TEST_F()
179 len = write(self->ctrl_fd, ctrl_cmd_reset, sizeof(ctrl_cmd_reset) - 1); in TEST_F()
187 len = write(self->thr_fd, wrong_thr_cmd, i); in TEST_F()
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| /linux/include/dt-bindings/memory/ |
| H A D | tegra234-mc.h | 182 /* MSS internal memqual MIU7 write clients */
186 /* MSS internal memqual MIU8 write clients */
190 /* MSS internal memqual MIU9 write clients */
194 /* MSS internal memqual MIU10 write clients */
198 /* MSS internal memqual MIU11 write clients */
202 /* MSS internal memqual MIU12 write clients */
206 /* MSS internal memqual MIU13 write clients */
230 /* PCIE6 write clients */
243 /* PCIE7 write clients */
247 /* High-definition audio (HDA) write clients */
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| H A D | tegra194-mc.h | 149 /* MSS internal memqual MIU7 write clients */
161 /* High-definition audio (HDA) write clients */
165 /* SATA write clients */
171 /* ISP Write client for Crossbar A */
173 /* ISP Write client Crossbar B */
177 /* XUSB_HOST write clients */
181 /* XUSB_DEV write clients */
189 /* sdmmca memory write client */
191 /* sdmmc memory write client */
193 /* sdmmcd memory write client */
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| H A D | nvidia,tegra264.h | 65 /* VIC Write client */
67 /* VI R5 Write client */
73 /* Audio processor(APE) Write client */
77 /* Audio DMA Write client */
83 /* VI Falcon Write client */
87 /* Write client of RCE */
89 /* PCIE0/MSI Write clients */
93 /* PCIE1/RPX4 Write clients */
97 /* PCIE2/DMX4 Write clients */
101 /* PCIE3/RPX4 Write clients */
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| /linux/tools/perf/pmu-events/arch/s390/cf_z16/ |
| H A D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
97 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache",
98 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
111 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Chip HP Hit",
112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
118 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Drawer HP Hit",
119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
125 "BriefDescription": "Directory Write Level 1 Data Cache from On-Chip L2-Cache",
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| /linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/ |
| H A D | metrics.json | 11 "BriefDescription": "bytes of all masters write to ddr",
13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
27 "BriefDescription": "bytes of a53 core write to ddr",
29 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
43 "BriefDescription": "bytes of supermix(m7) write to ddr",
45 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x000f\\,axi_id\\=0x0020@",
59 "BriefDescription": "bytes of gpu 3d write to ddr",
61 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0070@",
75 "BriefDescription": "bytes of gpu 2d write to ddr",
77 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0071@",
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| /linux/kernel/ |
| H A D | sysctl.c | 42 * enum sysctl_writes_mode - supported sysctl write modes
44 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
52 * sent to the write syscall. If dealing with strings respect the file
57 * These write modes control how current file position affects the behavior of
58 * updating sysctl values through the proc interface on each write.
76 static int _proc_do_string(char *data, int maxlen, int write, in _proc_do_string() argument
87 if (write) { in _proc_do_string()
175 * @write: %TRUE if this is a write to the sysctl file
189 int proc_dostring(const struct ctl_table *table, int write, in proc_dostring() argument
192 if (write) in proc_dostring()
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| /linux/tools/perf/pmu-events/arch/s390/cf_z17/ |
| H A D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
97 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache",
98 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
111 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Chip HP Hit",
112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
118 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Drawer HP Hit",
119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
125 "BriefDescription": "Directory Write Level 1 Data Cache from On-Chip L2-Cache",
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| /linux/Documentation/admin-guide/perf/ |
| H A D | fujitsu_uncore_pmu.rst | 50 - write-count
51 This event counts the number of write requests to MAC (including zero write,
52 full write, partial write, write cancel).
53 - write-count-write
54 This event counts the number of full write requests to MAC (not including
55 zero write).
56 - write-count-pwrite
57 This event counts the number of partial write requests to MAC.
60 - memory-write-count
61 This event counts the number of full write requests from MAC to memory.
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-bdi | 32 (read-write)
38 total write-back cache that relates to its current average
42 percentage of the write-back cache to a particular device.
45 (read-write)
52 total write-back cache that relates to its current average
56 of the write-back cache to a particular device. The value is
60 (read-write)
67 given percentage of the write-back cache. This is useful in
69 most of the write-back cache. For example in case of an NFS
73 (read-write)
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| /linux/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| H A D | macsec_api.h | 57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
75 /*! Pack the fields of rec, and write the packed data into the
77 * rec - [IN] The bitfield values to write to the table row.
78 * table_index - The table row to write (max 47).
93 /*! Pack the fields of rec, and write the packed data into the
95 * rec - [IN] The bitfield values to write to the table row.
96 * table_index - The table row to write (max 31).
111 /*! Pack the fields of rec, and write the packed data into the
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| /linux/Documentation/wmi/devices/ |
| H A D | msi-wmi-platform.rst | 26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
43 [WmiMethodId(1), Implemented, read, write, Description("Return the contents of a package")]
46 [WmiMethodId(2), Implemented, read, write, Description("Set the contents of a package")]
49 [WmiMethodId(3), Implemented, read, write, Description("Return the contents of a package")]
52 [WmiMethodId(4), Implemented, read, write, Description("Set the contents of a package")]
55 [WmiMethodId(5), Implemented, read, write, Description("Return the contents of a package")]
58 [WmiMethodId(6), Implemented, read, write, Description("Set the contents of a package")]
61 [WmiMethodId(7), Implemented, read, write, Description("Return the contents of a package")]
64 [WmiMethodId(8), Implemented, read, write, Description("Set the contents of a package")]
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| /linux/Documentation/filesystems/ |
| H A D | zonefs.rst | 12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
42 device that keeps track of the mandatory start LBA position of the next write
43 to the device. As a result of this write constraint, LBAs in a sequential zone
53 to, for instance, reduce internal write amplification due to garbage collection.
73 information. File sizes come from the device zone type and write pointer
80 state to make it read-only, preventing any data write.
94 For sequential write zones, the sub-directory "seq" is used.
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| /linux/tools/testing/selftests/bpf/ |
| H A D | generate_udp_fragments.py | 8 fragmented packets in C, it is much harder to read and write
10 easy to read / write.
12 So we choose to write this script that generates a valid C
33 f.write("// SPDX-License-Identifier: GPL-2.0\n")
34 f.write("/* DO NOT EDIT -- this file is generated */\n")
35 f.write("\n")
36 f.write("#ifndef _IP_CHECK_DEFRAG_FRAGS_H\n")
37 f.write("#define _IP_CHECK_DEFRAG_FRAGS_H\n")
38 f.write("\n")
39 f.write("#include <stdint.h>\n")
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| /linux/arch/mips/kernel/ |
| H A D | cps-vec-ns16550.S | 32 * _mips_cps_putc() - write a character to the UART
33 * @a0: ASCII character to write
45 * _mips_cps_puts() - write a string to the UART
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
66 * @a0: the 4b value to write to the UART
69 * Write a single hexadecimal character to the UART.
82 * _mips_cps_putx8 - write an 8b hex value to the UART
83 * @a0: the 8b value to write to the UART
86 * Write an 8 bit value (ie. 2 hexadecimal characters) to the UART.
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| /linux/tools/perf/pmu-events/arch/s390/cf_z13/ |
| H A D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
42 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
63 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur…
112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
154 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
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| /linux/arch/loongarch/mm/ |
| H A D | fault.c | 34 static int __kprobes spurious_fault(unsigned long write, unsigned long address) in spurious_fault() argument
62 return write ? pmd_write(pmdp_get(pmd)) : 1; in spurious_fault()
68 return write ? pte_write(ptep_get(pte)) : 1; in spurious_fault()
73 unsigned long write, unsigned long address) in no_context() argument
77 if (spurious_fault(write, address)) in no_context()
84 if (kfence_handle_page_fault(address, write, regs)) in no_context()
101 unsigned long write, unsigned long address) in do_out_of_memory() argument
108 no_context(regs, write, address); in do_out_of_memory()
115 unsigned long write, unsigned long address, int si_code) in do_sigbus() argument
119 no_context(regs, write, address); in do_sigbus()
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| /linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
| H A D | bus.json | 21 …"PublicDescription": "This event counts write transactions from measured CMG to CMG0, if measured …
24 …"BriefDescription": "This event counts write transactions from measured CMG to CMG0, if measured C…
27 …"PublicDescription": "This event counts write transactions from measured CMG to CMG1, if measured …
30 …"BriefDescription": "This event counts write transactions from measured CMG to CMG1, if measured C…
33 …"PublicDescription": "This event counts write transactions from measured CMG to CMG2, if measured …
36 …"BriefDescription": "This event counts write transactions from measured CMG to CMG2, if measured C…
39 …"PublicDescription": "This event counts write transactions from measured CMG to CMG3, if measured …
42 …"BriefDescription": "This event counts write transactions from measured CMG to CMG3, if measured C…
45 … "PublicDescription": "This event counts write transactions from measured CMG to tofu controller.",
48 "BriefDescription": "This event counts write transactions from measured CMG to tofu controller."
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| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-memory.json | 14 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
19 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
110 "BriefDescription": "All DRAM write CAS commands issued",
115 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
405 …ommands. : Precharge due to write : Counts the number of DRAM Precharge commands sent on this chan…
452 …erally do not expect to see RPQ become full except for potentially during Write Major Mode or whil…
462 …erally do not expect to see RPQ become full except for potentially during Write Major Mode or whil…
526 "BriefDescription": "Write Pending Queue Full Cycles",
532 …Write Pending Queue Full Cycles : Counts the number of cycles when the Write Pending Queue is full…
536 "BriefDescription": "Write Pending Queue Full Cycles",
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| /linux/arch/parisc/kernel/ |
| H A D | perf_asm.S | 556 ;* arg1 = 64-bit value to write
586 ; RDR 0 write sequence
588 sync ; RDR 0 write sequence
598 ; RDR 1 write sequence
610 ; RDR 2 write sequence
622 ; RDR 3 write sequence
634 ; RDR 4 write sequence
646 ; RDR 5 write sequence
658 ; RDR 6 write sequence
670 ; RDR 7 write sequence
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| H A D | cache.json | 114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co…
117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor…
120 …PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
126 …"PublicDescription": "L1 data cache write streaming mode. This event counts for each cycle where t…
129 …"BriefDescription": "L1 data cache write streaming mode. This event counts for each cycle where th…
132 …"PublicDescription": "L3 cache write streaming mode. This event counts for each cycle where the co…
135 …"BriefDescription": "L3 cache write streaming mode. This event counts for each cycle where the cor…
138 …blicDescription": "Last level cache write streaming mode. This event counts for each cycle where t…
141 …riefDescription": "Last level cache write streaming mode. This event counts for each cycle where t…
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| /linux/block/ |
| H A D | blk-zoned.c | 40 * Per-zone write plug.
42 * @ref: Zone write plug reference counter. A zone write plug reference is
48 * reference is dropped whenever the zone of the zone write plug is reset,
49 * finished and when the zone becomes full (last write BIO to the zone
54 * @wp_offset: The zone write pointer location relative to the start of the zone
58 * @rcu_head: RCU head to free zone write plugs with an RCU grace period.
75 * Zone write plug flags bits:
76 * - BLK_ZONE_WPLUG_PLUGGED: Indicates that the zone write plug is plugged,
77 * that is, that write BIOs are being throttled due to a write BIO already
78 * being executed or the zone write plug bio list is not empty.
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| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | uncore-memory.json | 13 "BriefDescription": "Counts every read and write request entering the Memory Controller 0.",
18 …write request entering the Memory Controller 0 (sum of all channels). All requests are counted as …
23 …"BriefDescription": "Counts every CAS write command sent from the Memory Controller 0 to DRAM (sum…
28 …"PublicDescription": "Counts every CAS write command sent from the Memory Controller 0 to DRAM (su…
43 "BriefDescription": "Counts every read and write request entering the Memory Controller 1.",
48 …write request entering the Memory Controller 1 (sum of all channels). All requests are counted as …
53 …"BriefDescription": "Counts every CAS write command sent from the Memory Controller 1 to DRAM (sum…
58 …"PublicDescription": "Counts every CAS write command sent from the Memory Controller 1 to DRAM (su…
79 "BriefDescription": "ACT command for a write request sent to DRAM",
95 "BriefDescription": "Write CAS command sent to DRAM",
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| /linux/drivers/gpu/drm/bridge/ |
| H A D | tda998x_drv.c | 101 * write a given register, we need to make sure CURPAGE register is set
109 #define REG_CURPAGE 0xff /* write */
114 #define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
122 #define REG_SOFTRESET REG(0x00, 0x0a) /* write */
125 #define REG_DDC_DISABLE REG(0x00, 0x0b) /* read/write */
126 #define REG_CCLK_ON REG(0x00, 0x0c) /* read/write */
127 #define REG_I2C_MASTER REG(0x00, 0x0d) /* read/write */
131 #define REG_FEAT_POWERDOWN REG(0x00, 0x0e) /* read/write */
135 #define REG_INT_FLAGS_0 REG(0x00, 0x0f) /* read/write */
136 #define REG_INT_FLAGS_1 REG(0x00, 0x10) /* read/write */
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