| /linux/Documentation/driver-api/md/ |
| H A D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
25 This mode mainly fixes the 'write hole' issue. For RAID 4/5/6 array, an unclean
27 and parity don't match. The reason is that a stripe write involves several RAID
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| /linux/include/dt-bindings/memory/ |
| H A D | tegra234-mc.h | 182 /* MSS internal memqual MIU7 write clients */
186 /* MSS internal memqual MIU8 write clients */
190 /* MSS internal memqual MIU9 write clients */
194 /* MSS internal memqual MIU10 write clients */
198 /* MSS internal memqual MIU11 write clients */
202 /* MSS internal memqual MIU12 write clients */
206 /* MSS internal memqual MIU13 write clients */
230 /* PCIE6 write clients */
243 /* PCIE7 write clients */
247 /* High-definition audio (HDA) write clients */
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| H A D | tegra194-mc.h | 149 /* MSS internal memqual MIU7 write clients */
161 /* High-definition audio (HDA) write clients */
165 /* SATA write clients */
171 /* ISP Write client for Crossbar A */
173 /* ISP Write client Crossbar B */
177 /* XUSB_HOST write clients */
181 /* XUSB_DEV write clients */
189 /* sdmmca memory write client */
191 /* sdmmc memory write client */
193 /* sdmmcd memory write client */
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| /linux/tools/perf/pmu-events/arch/s390/cf_z16/ |
| H A D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
97 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache",
98 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
104 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Intervention",
105 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
111 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Chip HP Hit",
112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
118 "BriefDescription": "Directory Write Level 1 Data Cache from L2-Cache with Drawer HP Hit",
119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
125 "BriefDescription": "Directory Write Level 1 Data Cache from On-Chip L2-Cache",
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| /linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/ |
| H A D | metrics.json | 11 "BriefDescription": "bytes of all masters write to ddr",
13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
27 "BriefDescription": "bytes of a53 core write to ddr",
29 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
43 "BriefDescription": "bytes of supermix(m7) write to ddr",
45 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x000f\\,axi_id\\=0x0020@",
59 "BriefDescription": "bytes of gpu 3d write to ddr",
61 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0070@",
75 "BriefDescription": "bytes of gpu 2d write to ddr",
77 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0071@",
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| /linux/tools/testing/selftests/kvm/x86_64/ |
| H A D | hyperv_features.c | |
| /linux/tools/perf/pmu-events/arch/arm64/ |
| H A D | recommended.json | 9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
45 "PublicDescription": "Level 1 data cache Write-Back, cleaning and coherency",
48 "BriefDescription": "L1D cache Write-Back, cleaning and coherency"
63 "PublicDescription": "Attributable Level 1 data TLB refill, write",
66 "BriefDescription": "L1D tlb refill, write"
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-bdi | 32 (read-write)
38 total write-back cache that relates to its current average
42 percentage of the write-back cache to a particular device.
45 (read-write)
52 total write-back cache that relates to its current average
56 of the write-back cache to a particular device. The value is
60 (read-write)
67 given percentage of the write-back cache. This is useful in
69 most of the write-back cache. For example in case of an NFS
73 (read-write)
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| /linux/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| H A D | macsec_api.h | 57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
75 /*! Pack the fields of rec, and write the packed data into the
77 * rec - [IN] The bitfield values to write to the table row.
78 * table_index - The table row to write (max 47).
93 /*! Pack the fields of rec, and write the packed data into the
95 * rec - [IN] The bitfield values to write to the table row.
96 * table_index - The table row to write (max 31).
111 /*! Pack the fields of rec, and write the packed data into the
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| /linux/Documentation/mm/ |
| H A D | process_addrs.rst | 45 * **mmap locks** - Each MM has a read/write semaphore :c:member:`!mmap_lock`
49 as a read/write semaphore in practice. A VMA read lock is obtained via
51 write lock via :c:func:`!vma_start_write` (all VMA write locks are unlocked
52 automatically when the mmap write lock is released). To take a VMA write lock
87 If you want to **write** VMA metadata fields, then things vary depending on the
90 * Obtain an mmap write lock at the MM granularity via :c:func:`!mmap_write_lock` (or a
93 * Obtain a VMA write lock via :c:func:`!vma_start_write` for each VMA you wish to
96 * If you want to be able to write to **any** field, you must also hide the VMA
97 from the reverse mapping by obtaining an **rmap write lock**.
99 VMA locks are special in that you must obtain an mmap **write** lock **first**
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| /linux/arch/loongarch/kernel/ |
| H A D | unaligned.c | 252 bool sign, write; in emulate_load_store_insn() local
266 write = false; in emulate_load_store_insn()
271 write = false; in emulate_load_store_insn()
276 write = true; in emulate_load_store_insn()
281 write = false; in emulate_load_store_insn()
286 write = false; in emulate_load_store_insn()
291 write = true; in emulate_load_store_insn()
296 write = false; in emulate_load_store_insn()
301 write = true; in emulate_load_store_insn()
307 write in emulate_load_store_insn()
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| /linux/Documentation/wmi/devices/ |
| H A D | msi-wmi-platform.rst | 26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
43 [WmiMethodId(1), Implemented, read, write, Description("Return the contents of a package")]
46 [WmiMethodId(2), Implemented, read, write, Description("Set the contents of a package")]
49 [WmiMethodId(3), Implemented, read, write, Description("Return the contents of a package")]
52 [WmiMethodId(4), Implemented, read, write, Description("Set the contents of a package")]
55 [WmiMethodId(5), Implemented, read, write, Description("Return the contents of a package")]
58 [WmiMethodId(6), Implemented, read, write, Description("Set the contents of a package")]
61 [WmiMethodId(7), Implemented, read, write, Description("Return the contents of a package")]
64 [WmiMethodId(8), Implemented, read, write, Description("Set the contents of a package")]
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| /linux/Documentation/filesystems/ |
| H A D | zonefs.rst | 12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
42 device that keeps track of the mandatory start LBA position of the next write
43 to the device. As a result of this write constraint, LBAs in a sequential zone
53 to, for instance, reduce internal write amplification due to garbage collection.
73 information. File sizes come from the device zone type and write pointer
80 state to make it read-only, preventing any data write.
94 For sequential write zones, the sub-directory "seq" is used.
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| /linux/tools/testing/selftests/bpf/ |
| H A D | generate_udp_fragments.py | 8 fragmented packets in C, it is much harder to read and write
10 easy to read / write.
12 So we choose to write this script that generates a valid C
33 f.write("// SPDX-License-Identifier: GPL-2.0\n")
34 f.write("/* DO NOT EDIT -- this file is generated */\n")
35 f.write("\n")
36 f.write("#ifndef _IP_CHECK_DEFRAG_FRAGS_H\n")
37 f.write("#define _IP_CHECK_DEFRAG_FRAGS_H\n")
38 f.write("\n")
39 f.write("#include <stdint.h>\n")
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| /linux/arch/mips/kernel/ |
| H A D | cps-vec-ns16550.S | 32 * _mips_cps_putc() - write a character to the UART
33 * @a0: ASCII character to write
45 * _mips_cps_puts() - write a string to the UART
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
66 * @a0: the 4b value to write to the UART
69 * Write a single hexadecimal character to the UART.
82 * _mips_cps_putx8 - write an 8b hex value to the UART
83 * @a0: the 8b value to write to the UART
86 * Write an 8 bit value (ie. 2 hexadecimal characters) to the UART.
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| /linux/tools/perf/pmu-events/arch/s390/cf_z13/ |
| H A D | extended.json | 7 …"PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in…
42 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
63 …"PublicDescription": "A directory write to the Level-1 Instruction cache directory where the retur…
112 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
119 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
126 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
133 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
140 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
147 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
154 …"PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cac…
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| /linux/arch/loongarch/mm/ |
| H A D | fault.c | 34 static int __kprobes spurious_fault(unsigned long write, unsigned long address) in spurious_fault() argument
62 return write ? pmd_write(pmdp_get(pmd)) : 1; in spurious_fault()
68 return write ? pte_write(ptep_get(pte)) : 1; in spurious_fault()
73 unsigned long write, unsigned long address) in no_context() argument
77 if (spurious_fault(write, address)) in no_context()
84 if (kfence_handle_page_fault(address, write, regs)) in no_context()
101 unsigned long write, unsigned long address) in do_out_of_memory() argument
108 no_context(regs, write, address); in do_out_of_memory()
115 unsigned long write, unsigned long address, int si_code) in do_sigbus() argument
119 no_context(regs, write, address); in do_sigbus()
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| /linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ |
| H A D | bus.json | 21 …"PublicDescription": "This event counts write transactions from measured CMG to CMG0, if measured …
24 …"BriefDescription": "This event counts write transactions from measured CMG to CMG0, if measured C…
27 …"PublicDescription": "This event counts write transactions from measured CMG to CMG1, if measured …
30 …"BriefDescription": "This event counts write transactions from measured CMG to CMG1, if measured C…
33 …"PublicDescription": "This event counts write transactions from measured CMG to CMG2, if measured …
36 …"BriefDescription": "This event counts write transactions from measured CMG to CMG2, if measured C…
39 …"PublicDescription": "This event counts write transactions from measured CMG to CMG3, if measured …
42 …"BriefDescription": "This event counts write transactions from measured CMG to CMG3, if measured C…
45 … "PublicDescription": "This event counts write transactions from measured CMG to tofu controller.",
48 "BriefDescription": "This event counts write transactions from measured CMG to tofu controller."
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| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-memory.json | 14 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
19 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
110 "BriefDescription": "All DRAM write CAS commands issued",
115 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
405 …ommands. : Precharge due to write : Counts the number of DRAM Precharge commands sent on this chan…
452 …erally do not expect to see RPQ become full except for potentially during Write Major Mode or whil…
462 …erally do not expect to see RPQ become full except for potentially during Write Major Mode or whil…
526 "BriefDescription": "Write Pending Queue Full Cycles",
532 …Write Pending Queue Full Cycles : Counts the number of cycles when the Write Pending Queue is full…
536 "BriefDescription": "Write Pending Queue Full Cycles",
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| /linux/arch/parisc/kernel/ |
| H A D | perf_asm.S | 556 ;* arg1 = 64-bit value to write
586 ; RDR 0 write sequence
588 sync ; RDR 0 write sequence
598 ; RDR 1 write sequence
610 ; RDR 2 write sequence
622 ; RDR 3 write sequence
634 ; RDR 4 write sequence
646 ; RDR 5 write sequence
658 ; RDR 6 write sequence
670 ; RDR 7 write sequence
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| /linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| H A D | cache.json | 114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co…
117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor…
120 …PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
126 …"PublicDescription": "L1 data cache write streaming mode. This event counts for each cycle where t…
129 …"BriefDescription": "L1 data cache write streaming mode. This event counts for each cycle where th…
132 …"PublicDescription": "L3 cache write streaming mode. This event counts for each cycle where the co…
135 …"BriefDescription": "L3 cache write streaming mode. This event counts for each cycle where the cor…
138 …blicDescription": "Last level cache write streaming mode. This event counts for each cycle where t…
141 …riefDescription": "Last level cache write streaming mode. This event counts for each cycle where t…
|
| /linux/block/ |
| H A D | blk-zoned.c | 38 * Per-zone write plug.
40 * @ref: Zone write plug reference counter. A zone write plug reference is
46 * reference is dropped whenever the zone of the zone write plug is reset,
47 * finished and when the zone becomes full (last write BIO to the zone
52 * @wp_offset: The zone write pointer location relative to the start of the zone
56 * @rcu_head: RCU head to free zone write plugs with an RCU grace period.
73 * Zone write plug flags bits:
74 * - BLK_ZONE_WPLUG_PLUGGED: Indicates that the zone write plug is plugged,
75 * that is, that write BIOs are being throttled due to a write BIO already
76 * being executed or the zone write plug bio list is not empty.
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| /linux/fs/ubifs/ |
| H A D | io.c | 16 * write-buffering support. Write buffers help to save space which otherwise
18 * Instead, data first goes to the write-buffer and is flushed when the
22 * UBIFS distinguishes between minimum write size (@c->min_io_size) and maximum
23 * write size (@c->max_write_size). The latter is the maximum amount of bytes
26 * @c->min_io_size <= @c->max_write_size. Write-buffers are of
28 * write-buffer is flushed, only the portion of it (aligned to @c->min_io_size
29 * boundary) which contains data is written, not the whole write-buffer,
33 * hand, we want to write in optimal @c->max_write_size bytes chunks, which
35 * other hand, we do not want to waste space when synchronizing the write
37 * the next write offset to be not aligned to @c->max_write_size bytes. So the
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| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | uncore-memory.json | 13 "BriefDescription": "Counts every read and write request entering the Memory Controller 0.",
18 …write request entering the Memory Controller 0 (sum of all channels). All requests are counted as …
23 …"BriefDescription": "Counts every CAS write command sent from the Memory Controller 0 to DRAM (sum…
28 …"PublicDescription": "Counts every CAS write command sent from the Memory Controller 0 to DRAM (su…
43 "BriefDescription": "Counts every read and write request entering the Memory Controller 1.",
48 …write request entering the Memory Controller 1 (sum of all channels). All requests are counted as …
53 …"BriefDescription": "Counts every CAS write command sent from the Memory Controller 1 to DRAM (sum…
58 …"PublicDescription": "Counts every CAS write command sent from the Memory Controller 1 to DRAM (su…
79 "BriefDescription": "ACT command for a write request sent to DRAM",
95 "BriefDescription": "Write CAS command sent to DRAM",
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | st,stm32-fmc2-ebi-props.yaml | 25 8: Synchronous read synchronous write PSRAM.
26 9: Synchronous read asynchronous write PSRAM.
27 10: Synchronous read synchronous write NOR.
28 11: Synchronous read asynchronous write NOR.
90 phase in nanoseconds used for asynchronous read/write transactions.
94 phase in nanoseconds used for asynchronous multiplexed read/write
99 in nanoseconds used for asynchronous read/write transactions.
103 end of current read/write transaction and the next transaction.
107 in nanoseconds used for asynchronous read/write transactions.
117 st,fmc2-ebi-cs-write-address-setup-ns:
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