| /linux/drivers/clocksource/ |
| H A D | timer-ti-dm.c | 33 #include <clocksource/timer-ti-dm.h>
36 * timer errata flags
40 * timer counter register is never read. For more details please refer to
158 * dmtimer_read - read timer registers in posted and non-posted mode
159 * @timer: timer pointer over which read operation to perform
166 static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg) in dmtimer_read() argument
174 if (wp && timer->posted) in dmtimer_read()
175 while (readl_relaxed(timer->pend) & wp) in dmtimer_read()
178 return readl_relaxed(timer->func_base + offset); in dmtimer_read()
182 * dmtimer_write - write timer registers in posted and non-posted mode
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| H A D | timer-zevio.c | 3 * linux/drivers/clocksource/zevio-timer.c
64 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
76 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local
79 /* Disable timer interrupts */ in zevio_timer_shutdown()
80 writel(0, timer->interrupt_regs + IO_INTR_MSK); in zevio_timer_shutdown()
81 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); in zevio_timer_shutdown()
82 /* Stop timer */ in zevio_timer_shutdown()
83 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_shutdown()
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| H A D | Kconfig | 36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
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| H A D | Makefile | 2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
18 obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
19 obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
20 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
21 obj-$(CONFIG_OMAP_DM_SYSTIMER) += timer-ti-dm-systimer.o
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| H A D | timer-microchip-pit64b.c | 3 * 64-bit Periodic Interval Timer driver
38 #define MCHP_PIT64B_TLSBR 0x20 /* Timer LSB Register */
40 #define MCHP_PIT64B_TMSBR 0x24 /* Timer MSB Register */
51 * struct mchp_pit64b_timer - PIT64B timer data structure
66 * @timer: PIT64B timer
70 struct mchp_pit64b_timer timer; member
80 * @timer: PIT64B timer
84 struct mchp_pit64b_timer timer; member
92 /* Base address for clocksource timer. */
94 /* Default cycles for clockevent timer. */
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| H A D | timer-rockchip.c | 3 * Rockchip timer support
44 struct rk_timer timer; member
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
55 static inline void rk_timer_disable(struct rk_timer *timer) in rk_timer_disable() argument
57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable()
60 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags) in rk_timer_enable() argument
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
66 struct rk_timer *timer) in rk_timer_update_counter() argument
68 writel_relaxed(cycles, timer->base + TIMER_LOAD_COUNT0); in rk_timer_update_counter()
69 writel_relaxed(0, timer->base + TIMER_LOAD_COUNT1); in rk_timer_update_counter()
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| H A D | dw_apb_timer.c | 49 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl() argument
51 return readl(timer->base + offs); in apbt_readl()
54 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
57 writel(val, timer->base + offs); in apbt_writel()
60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
65 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
71 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
73 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
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| /linux/drivers/rtc/ |
| H A D | rtc-brcmstb-waketimer.c | 49 static inline bool brcmstb_waketmr_is_pending(struct brcmstb_waketmr *timer) in brcmstb_waketmr_is_pending() argument
53 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending()
57 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
61 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm()
62 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm()
63 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm()
64 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER); in brcmstb_waketmr_clear_alarm()
65 writel_relaxed(reg - 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_clear_alarm()
66 writel_relaxed(WKTMR_ALARM_EVENT, timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
67 (void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
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| /linux/include/linux/ |
| H A D | hrtimer.h | 21 #include <linux/timer.h>
28 * HRTIMER_MODE_PINNED - Timer is bound to CPU (is only considered
29 * when starting the timer)
30 * HRTIMER_MODE_SOFT - Timer callback function will be executed in
32 * HRTIMER_MODE_HARD - Timer callback function will be executed in
59 * Values to track state of the timer
66 * The callback state is not part of the timer->state because clearing it would
67 * mean touching the timer after the callback, this makes it impossible to free
68 * the timer from the callback function.
72 * timer->base->cpu_base->running == timer
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| H A D | timer.h | 26 * @TIMER_DEFERRABLE: A deferrable timer will work normally when the
28 * to service it; instead, the timer will be serviced when the CPU
29 * eventually wakes up with a subsequent non-deferrable timer.
31 * @TIMER_IRQSAFE: An irqsafe timer is executed with IRQ disabled and
39 * @TIMER_PINNED: A pinned timer will always expire on the CPU on which the
40 * timer was enqueued. When a particular CPU is required, add_timer_on()
68 * LOCKDEP and DEBUG timer interfaces.
70 void init_timer_key(struct timer_list *timer,
75 extern void init_timer_on_stack_key(struct timer_list *timer,
80 static inline void init_timer_on_stack_key(struct timer_list *timer, in init_timer_on_stack_key() argument
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| /linux/tools/testing/selftests/kvm/aarch64/ |
| H A D | arch_timer_edge_cases.c | 3 * arch_timer_edge_cases.c - Tests the aarch64 timer IRQ functionality.
5 * The test validates some edge cases related to the arch-timer:
11 * - masking/unmasking using the timer control mask.
52 /* Virtual or physical timer and counter tests. */
53 enum arch_timer timer; member
54 /* Delay used for most timer tests. */
60 /* Whether to test the physical timer. */
62 /* Whether to test the virtual timer. */
84 typedef void (*sleep_method_t)(enum arch_timer timer, uint64_t usec);
86 static void sleep_poll(enum arch_timer timer, uint64_t usec);
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| /linux/net/netfilter/ |
| H A D | xt_IDLETIMER.c | 5 * Netfilter module to trigger a timer when packet matches.
6 * After timer expires a kevent will be sent.
20 #include <linux/timer.h>
35 struct timer_list timer; member
66 struct idletimer_tg *timer; in idletimer_tg_show() local
73 timer = __idletimer_tg_find_by_label(attr->attr.name); in idletimer_tg_show()
74 if (timer) { in idletimer_tg_show()
75 if (timer->timer_type & XT_IDLETIMER_ALARM) { in idletimer_tg_show()
76 ktime_t expires_alarm = alarm_expires_remaining(&timer->alarm); in idletimer_tg_show()
80 expires = timer->timer.expires; in idletimer_tg_show()
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| /linux/kernel/time/ |
| H A D | timer.c | 16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
59 #include <trace/events/timer.h>
66 * The timer wheel has LVL_DEPTH array levels. Each level provides an array of
73 * The array level of a newly armed timer depends on the relative expiry
77 * Contrary to the original timer wheel implementation, which aims for 'exact'
79 * the timers into the lower array levels. The previous 'classic' timer wheel
84 * This is an optimization of the original timer wheel implementation for the
85 * majority of the timer wheel use cases: timeouts. The vast majority of
207 * struct timer_base - Per CPU timer base (number of base depends on config)
211 * currently running timer, the pointer is set to the
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| H A D | hrtimer.c | 9 * In contrast to the low-resolution timeout API, aka timer wheel,
16 * Based on the original timer wheel code
42 #include <linux/timer.h>
48 #include <trace/events/timer.h>
62 * The timer bases:
65 * into the timer bases by the hrtimer_base_type enum. When trying
136 * timer->base->cpu_base
155 * means that all timers which are tied to this base via timer->base are
161 * When the timer's base is locked, and the timer removed from list, it is
162 * possible to set timer->base = &migration_base and drop the lock: the timer
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| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | ti,timer-dm.yaml | 4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
7 title: TI dual-mode timer
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
20 - ti,am335x-timer
21 - ti,am335x-timer-1ms
22 - ti,am654-timer
23 - ti,dm814-timer
24 - ti,dm816-timer
25 - ti,omap2420-timer
26 - ti,omap3430-timer
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| H A D | mediatek,timer.yaml | 4 $id: http://devicetree.org/schemas/timer/mediatek,timer.yaml#
14 CPUX (ARM/ARM64 System Timer), GPT (General Purpose Timer)
15 and SYST (System Timer).
22 - mediatek,mt6577-timer
23 - mediatek,mt6765-timer
28 - mediatek,mt2701-timer
29 - mediatek,mt6580-timer
30 - mediatek,mt6582-timer
31 - mediatek,mt6589-timer
32 - mediatek,mt7623-timer
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| H A D | nvidia,tegra-timer.yaml | 4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
7 title: NVIDIA Tegra timer
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
33 - nvidia,tegra114-timer
34 - nvidia,tegra124-timer
35 - nvidia,tegra132-timer
36 - const: nvidia,tegra30-timer
38 - const: nvidia,tegra30-timer
39 - const: nvidia,tegra20-timer
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| /linux/sound/core/ |
| H A D | timer.c | 19 #include <sound/timer.h>
39 MODULE_DESCRIPTION("ALSA timer interface");
47 MODULE_ALIAS("devname:snd/timer");
116 /* Internal data structure for keeping the state of the userspace-driven timer */
119 struct snd_timer *timer; member
140 static int snd_timer_free(struct snd_timer *timer);
145 static void snd_timer_reschedule(struct snd_timer * timer, unsigned long ticks_left);
148 * create a timer instance with the given owner string.
184 * find a timer instance from the given timer id
188 struct snd_timer *timer; in snd_timer_find() local
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| /linux/sound/isa/gus/ |
| H A D | gus_timer.c | 14 * Timer 1 - 80us
17 static int snd_gf1_timer1_start(struct snd_timer * timer) in snd_gf1_timer1_start() argument
24 gus = snd_timer_chip(timer); in snd_gf1_timer1_start()
26 ticks = timer->sticks; in snd_gf1_timer1_start()
28 snd_gf1_write8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1, 256 - ticks); /* timer 1 count */ in snd_gf1_timer1_start()
29 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* enable timer 1 IRQ */ in snd_gf1_timer1_start()
30 snd_gf1_adlib_write(gus, 0x04, tmp >> 2); /* timer 2 start */ in snd_gf1_timer1_start()
35 static int snd_gf1_timer1_stop(struct snd_timer * timer) in snd_gf1_timer1_stop() argument
41 gus = snd_timer_chip(timer); in snd_gf1_timer1_stop()
44 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* disable timer #1 */ in snd_gf1_timer1_stop()
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| /linux/arch/s390/kernel/ |
| H A D | vtime.c | 3 * Virtual cpu timer based timer functions.
39 u64 timer; in set_vtimer() local
42 " stpt %0\n" /* Store current cpu timer value */ in set_vtimer()
44 : "=Q" (timer) : "Q" (expires)); in set_vtimer()
45 lc->system_timer += lc->last_update_timer - timer; in set_vtimer()
120 u64 timer, clock, user, guest, system, hardirq, softirq; in do_account_vtime() local
123 timer = lc->last_update_timer; in do_account_vtime()
126 " stpt %0\n" /* Store current cpu timer value */ in do_account_vtime()
132 timer -= lc->last_update_timer; in do_account_vtime()
135 lc->hardirq_timer += timer; in do_account_vtime()
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| /linux/arch/nios2/kernel/ |
| H A D | time.c | 22 #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0"
42 struct nios2_timer timer; member
47 struct nios2_timer timer; member
63 static u16 timer_readw(struct nios2_timer *timer, u32 offs) in timer_readw() argument
65 return readw(timer->base + offs); in timer_readw()
68 static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs) in timer_writew() argument
70 writew(val, timer->base + offs); in timer_writew()
73 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) in read_timersnapshot() argument
77 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot()
78 count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 | in read_timersnapshot()
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| /linux/tools/testing/selftests/kvm/include/aarch64/ |
| H A D | arch_timer.h | 3 * ARM Generic Timer specific interface
34 static inline uint64_t timer_get_cntct(enum arch_timer timer) in timer_get_cntct() argument
38 switch (timer) { in timer_get_cntct()
44 GUEST_FAIL("Unexpected timer type = %u", timer); in timer_get_cntct()
51 static inline void timer_set_cval(enum arch_timer timer, uint64_t cval) in timer_set_cval() argument
53 switch (timer) { in timer_set_cval()
61 GUEST_FAIL("Unexpected timer type = %u", timer); in timer_set_cval()
67 static inline uint64_t timer_get_cval(enum arch_timer timer) in timer_get_cval() argument
69 switch (timer) { in timer_get_cval()
75 GUEST_FAIL("Unexpected timer type = %u", timer); in timer_get_cval()
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| /linux/include/linux/mfd/ |
| H A D | rz-mtu3.h | 13 #define RZ_MTU3_TSTRA 0x080 /* Timer start register A */
14 #define RZ_MTU3_TSTRB 0x880 /* Timer start register B */
17 #define RZ_MTU3_TDDRA 0x016 /* Timer dead time data register A */
18 #define RZ_MTU3_TDDRB 0x816 /* Timer dead time data register B */
19 #define RZ_MTU3_TCDRA 0x014 /* Timer cycle data register A */
20 #define RZ_MTU3_TCDRB 0x814 /* Timer cycle data register B */
21 #define RZ_MTU3_TCBRA 0x022 /* Timer cycle buffer register A */
22 #define RZ_MTU3_TCBRB 0x822 /* Timer cycle buffer register B */
23 #define RZ_MTU3_TCNTSA 0x020 /* Timer subcounter A */
24 #define RZ_MTU3_TCNTSB 0x820 /* Timer subcounter B */
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| /linux/sound/core/seq/oss/ |
| H A D | seq_oss_timer.c | 5 * Timer control routines
24 static void calc_alsa_tempo(struct seq_oss_timer *timer);
29 * create and register a new timer.
54 * delete timer.
55 * if no more timer exists, stop the queue.
70 * 0 : not a timer event -- enqueue this event
116 calc_alsa_tempo(struct seq_oss_timer *timer) in calc_alsa_tempo() argument
118 timer->tempo = (60 * 1000000) / timer->oss_tempo; in calc_alsa_tempo()
119 timer->ppq = timer->oss_timebase; in calc_alsa_tempo()
124 * dispatch a timer event
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| /linux/tools/testing/selftests/bpf/progs/ |
| H A D | timer.c | 13 struct bpf_timer timer; member
73 static int timer_cb1(void *map, int *key, struct bpf_timer *timer) in timer_cb1() argument
76 * Once via array timer callback and once via lru timer callback in timer_cb1()
80 /* *key == 0 - the callback was called for array timer. in timer_cb1()
81 * *key == 4 - the callback was called from lru timer. in timer_cb1()
87 /* rearm array timer to be called again in ~35 seconds */ in timer_cb1()
88 if (bpf_timer_start(timer, 1ull << 35, 0) != 0) in timer_cb1()
113 * element and force deletion of this timer in timer_cb1()
120 * which means that key/timer memory was reused in timer_cb1()
126 /* check that the timer was removed */ in timer_cb1()
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