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/linux/arch/arm/boot/dts/nvidia/
H A DMakefile16 tegra20-acer-a500-picasso.dtb \
17 tegra20-asus-tf101.dtb \
18 tegra20-harmony.dtb \
19 tegra20-colibri-eval-v3.dtb \
20 tegra20-colibri-iris.dtb \
21 tegra20-medcom-wide.dtb \
22 tegra20-paz00.dtb \
23 tegra20-plutux.dtb \
24 tegra20-seaboard.dtb \
25 tegra20-tec.dtb \
[all …]
H A Dtegra20.dtsi2 #include <dt-bindings/clock/tegra20-car.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
36 compatible = "nvidia,tegra20-host1x";
54 compatible = "nvidia,tegra20-mpe";
66 compatible = "nvidia,tegra20-vi";
78 compatible = "nvidia,tegra20-epp";
90 compatible = "nvidia,tegra20-isp";
101 compatible = "nvidia,tegra20-gr2d";
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H A Dtegra20-acer-a500-picasso.dts9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
15 compatible = "acer,picasso", "nvidia,tegra20";
395 compatible = "nvidia,tegra20-hsuart";
402 compatible = "nvidia,tegra20-hsuart";
714 compatible = "nvidia,tegra20-emc-table";
732 compatible = "nvidia,tegra20-emc-table";
750 compatible = "nvidia,tegra20-emc-table";
768 compatible = "nvidia,tegra20-emc-table";
[all …]
/linux/Documentation/devicetree/bindings/i2c/
H A Dnvidia,tegra20-i2c.yaml4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
16 - description: Tegra20 has 4 generic I2C controller. This can support
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
21 - description: Tegra20 has specific I2C controller called as DVC I2C
25 compatible with "nvidia,tegra20-i2c-dvc".
26 const: nvidia,tegra20-i2c-dvc
29 similar to Tegra20 I2C controller with additional feature: Continue
33 This is also compatible with "nvidia,tegra20-i2c" without continue
37 - const: nvidia,tegra20-i2c
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra20-host1x.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
20 - nvidia,tegra20-host1x
119 - nvidia,tegra20-host1x
245 #include <dt-bindings/clock/tegra20-car.h>
247 #include <dt-bindings/memory/tegra20-mc.h>
250 compatible = "nvidia,tegra20-host1x";
266 compatible = "nvidia,tegra20-mpe";
275 compatible = "nvidia,tegra20-vi";
284 compatible = "nvidia,tegra20-epp";
293 compatible = "nvidia,tegra20-isp";
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H A Dnvidia,tegra20-gr2d.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml#
19 - nvidia,tegra20-gr2d
62 #include <dt-bindings/clock/tegra20-car.h>
64 #include <dt-bindings/memory/tegra20-mc.h>
67 compatible = "nvidia,tegra20-gr2d";
H A Dnvidia,tegra20-gr3d.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#
19 - nvidia,tegra20-gr3d
68 const: nvidia,tegra20-gr2d
204 #include <dt-bindings/clock/tegra20-car.h>
205 #include <dt-bindings/memory/tegra20-mc.h>
208 compatible = "nvidia,tegra20-gr3d";
H A Dnvidia,tegra20-vi.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml#
19 - const: nvidia,tegra20-vi
77 $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml
106 - nvidia,tegra20-vi
120 #include <dt-bindings/clock/tegra20-car.h>
140 compatible = "nvidia,tegra20-vi";
148 compatible = "nvidia,tegra20-vip";
H A Dnvidia,tegra20-tvo.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml#
19 - nvidia,tegra20-tvo
49 #include <dt-bindings/clock/tegra20-car.h>
53 compatible = "nvidia,tegra20-tvo";
H A Dnvidia,tegra20-epp.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-epp.yaml#
19 - nvidia,tegra20-epp
59 #include <dt-bindings/clock/tegra20-car.h>
63 compatible = "nvidia,tegra20-epp";
/linux/drivers/clocksource/
H A Dtimer-tegra.c212 static inline unsigned int tegra_base_for_cpu(int cpu, bool tegra20) in tegra_base_for_cpu() argument
214 if (tegra20) { in tegra_base_for_cpu()
230 static inline unsigned int tegra_irq_idx_for_cpu(int cpu, bool tegra20) in tegra_irq_idx_for_cpu() argument
232 if (tegra20) in tegra_irq_idx_for_cpu()
239 bool tegra20) in tegra_rate_for_timer() argument
245 if (tegra20) in tegra_rate_for_timer()
251 static int __init tegra_init_timer(struct device_node *np, bool tegra20, in tegra_init_timer() argument
304 unsigned long rate = tegra_rate_for_timer(to, tegra20); in tegra_init_timer()
305 unsigned int base = tegra_base_for_cpu(cpu, tegra20); in tegra_init_timer()
306 unsigned int idx = tegra_irq_idx_for_cpu(cpu, tegra20); in tegra_init_timer()
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/linux/sound/soc/tegra/
H A DMakefile5 snd-soc-tegra20-ac97-y := tegra20_ac97.o
6 snd-soc-tegra20-das-y := tegra20_das.o
7 snd-soc-tegra20-i2s-y := tegra20_i2s.o
8 snd-soc-tegra20-spdif-y := tegra20_spdif.o
25 obj-$(CONFIG_SND_SOC_TEGRA20_AC97) += snd-soc-tegra20-ac97.o
26 obj-$(CONFIG_SND_SOC_TEGRA20_DAS) += snd-soc-tegra20-das.o
27 obj-$(CONFIG_SND_SOC_TEGRA20_I2S) += snd-soc-tegra20-i2s.o
28 obj-$(CONFIG_SND_SOC_TEGRA20_SPDIF) += snd-soc-tegra20-spdif.o
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra20-mc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-mc.yaml#
7 title: NVIDIA Tegra20 SoC Memory Controller
15 The Tegra20 Memory Controller merges request streams from various client
21 Tegra20 Memory Controller includes the GART (Graphics Address Relocation
27 const: nvidia,tegra20-mc-gart
68 compatible = "nvidia,tegra20-mc-gart";
H A Dnvidia,tegra20-emc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-emc.yaml#
7 title: NVIDIA Tegra20 SoC External Memory Controller
18 parameters and initialization settings. Tegra20 EMC supports multiple JEDEC
23 const: nvidia,tegra20-emc
68 const: nvidia,tegra20-emc-table
198 compatible = "nvidia,tegra20-emc";
222 compatible = "nvidia,tegra20-emc-table";
/linux/Documentation/devicetree/bindings/clock/
H A Dnvidia,tegra20-car.yaml4 $id: http://devicetree.org/schemas/clock/nvidia,tegra20-car.yaml#
31 - nvidia,tegra20-car
51 - nvidia,tegra20-sclk
85 #include <dt-bindings/clock/tegra20-car.h>
88 compatible = "nvidia,tegra20-car";
94 compatible = "nvidia,tegra20-sclk";
/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra20-i2s.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-i2s.yaml#
7 title: NVIDIA Tegra20 I2S Controller
20 const: nvidia,tegra20-i2s
48 This allows multiple Tegra20 audio components work simultaneously by
67 compatible = "nvidia,tegra20-i2s";
H A Dnvidia,tegra20-ac97.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-ac97.yaml#
7 title: NVIDIA Tegra20 AC97 controller
15 const: nvidia,tegra20-ac97
64 #include <dt-bindings/clock/tegra20-car.h>
71 compatible = "nvidia,tegra20-ac97";
H A Dnvidia,tegra20-spdif.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
7 title: NVIDIA Tegra20 S/PDIF Controller
24 const: nvidia,tegra20-spdif
57 This allows multiple Tegra20 audio components work simultaneously by
77 compatible = "nvidia,tegra20-spdif";
/linux/Documentation/devicetree/bindings/fuse/
H A Dnvidia,tegra20-fuse.yaml4 $id: http://devicetree.org/schemas/fuse/nvidia,tegra20-fuse.yaml#
17 - nvidia,tegra20-efuse
66 - nvidia,tegra20-efuse
79 #include <dt-bindings/clock/tegra20-car.h>
82 compatible = "nvidia,tegra20-efuse";
/linux/Documentation/devicetree/bindings/spi/
H A Dnvidia,tegra20-sflash.yaml4 $id: http://devicetree.org/schemas/spi/nvidia,tegra20-sflash.yaml#
7 title: NVIDIA Tegra20 SFLASH controller
15 const: nvidia,tegra20-sflash
66 #include <dt-bindings/clock/tegra20-car.h>
70 compatible = "nvidia,tegra20-sflash";
H A Dnvidia,tegra20-slink.yaml4 $id: http://devicetree.org/schemas/spi/nvidia,tegra20-slink.yaml#
7 title: NVIDIA Tegra20/30 SLINK controller
16 - nvidia,tegra20-slink
75 #include <dt-bindings/clock/tegra20-car.h>
79 compatible = "nvidia,tegra20-slink";
/linux/Documentation/devicetree/bindings/pwm/
H A Dnvidia,tegra20-pwm.yaml4 $id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#
17 - nvidia,tegra20-pwm
28 - nvidia,tegra20-pwm
86 #include <dt-bindings/clock/tegra20-car.h>
89 compatible = "nvidia,tegra20-pwm";
/linux/Documentation/devicetree/bindings/timer/
H A Dnvidia,tegra-timer.yaml39 - const: nvidia,tegra20-timer
53 const: nvidia,tegra20-timer
81 - const: nvidia,tegra20-timer
86 - const: nvidia,tegra20-timer
88 The Tegra20 timer provides four 29-bit timer channels and a single 32-bit free
116 compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
/linux/Documentation/devicetree/bindings/gpio/
H A Dnvidia,tegra20-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
17 - nvidia,tegra20-gpio
31 description: The interrupt outputs from the controller. For Tegra20,
97 compatible = "nvidia,tegra20-gpio";
/linux/Documentation/devicetree/bindings/misc/
H A Dnvidia,tegra20-apbmisc.yaml4 $id: http://devicetree.org/schemas/misc/nvidia,tegra20-apbmisc.yaml#
22 - const: nvidia,tegra20-apbmisc
25 - const: nvidia,tegra20-apbmisc
48 compatible = "nvidia,tegra20-apbmisc";

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