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/linux/arch/parisc/kernel/
H A Dunaligned.c121 " mtsp %4, %%sr1\n" in emulate_ldh()
122 "1: ldbs 0(%%sr1,%3), %2\n" in emulate_ldh()
123 "2: ldbs 1(%%sr1,%3), %0\n" in emulate_ldh()
150 " mtsp %5, %%sr1\n" in emulate_ldw()
152 "1: ldw 0(%%sr1,%4),%0\n" in emulate_ldw()
153 "2: ldw 4(%%sr1,%4),%3\n" in emulate_ldw()
188 " mtsp %5, %%sr1\n" in emulate_ldd()
190 "1: ldd 0(%%sr1,%2),%0\n" in emulate_ldd()
191 "2: ldd 8(%%sr1,%2),%4\n" in emulate_ldd()
203 " mtsp %5, %%sr1\n" in emulate_ldd()
[all …]
H A Dpacache.S79 mtsp %r20, %sr1
85 pitlbe %r0(%sr1, %r28)
86 pitlbe,m %arg1(%sr1, %r28) /* Last pitlbe and addr adjust */
94 mtsp %r20, %sr1
100 pitlbe,m %arg1(%sr1, %r28) /* pitlbe for one loop */
123 mtsp %r20, %sr1
129 pdtlbe %r0(%sr1, %r28)
130 pdtlbe,m %arg1(%sr1, %r28) /* Last pdtlbe and addr adjust */
138 mtsp %r20, %sr1
144 pdtlbe,m %arg1(%sr1, %r28) /* pdtlbe for one loop */
[all …]
H A Dentry.S1199 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1200 mtsp spc,%sr1
1202 idtlba pte,(%sr1,va)
1203 idtlbp prot,(%sr1,va)
1205 mtsp t1, %sr1 /* Restore sr1 */
1233 mfsp %sr1,t1 /* Save sr1 so we can use it in tlb inserts */
1234 mtsp spc,%sr1
1236 idtlba pte,(%sr1,va)
1237 idtlbp prot,(%sr1,va)
1239 mtsp t1, %sr1 /* Restore sr1 */
[all …]
/linux/arch/powerpc/platforms/cell/spufs/
H A Dhw_ops.c228 u64 sr1; in spu_hw_master_start() local
231 sr1 = spu_mfc_sr1_get(spu) | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_start()
232 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_start()
239 u64 sr1; in spu_hw_master_stop() local
242 sr1 = spu_mfc_sr1_get(spu) & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_hw_master_stop()
243 spu_mfc_sr1_set(spu, sr1); in spu_hw_master_stop()
H A Dbacking_ops.c298 u64 sr1; in spu_backing_master_start() local
301 sr1 = csa->priv1.mfc_sr1_RW | MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_start()
302 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_start()
309 u64 sr1; in spu_backing_master_stop() local
312 sr1 = csa->priv1.mfc_sr1_RW & ~MFC_STATE1_MASTER_RUN_CONTROL_MASK; in spu_backing_master_stop()
313 csa->priv1.mfc_sr1_RW = sr1; in spu_backing_master_stop()
H A Drun.c86 u64 sr1; in spu_setup_isolated() local
125 sr1 = spu_mfc_sr1_get(ctx->spu); in spu_setup_isolated()
126 sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
127 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
169 sr1 |= MFC_STATE1_PROBLEM_STATE_MASK; in spu_setup_isolated()
170 spu_mfc_sr1_set(ctx->spu, sr1); in spu_setup_isolated()
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c75 u8 sr1[2]; in nv40_ram_prog() local
85 sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000)); in nv40_ram_prog()
86 if (!(sr1[i] & 0x20)) in nv40_ram_prog()
112 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20); in nv40_ram_prog()
172 nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i]); in nv40_ram_prog()
/linux/Documentation/devicetree/bindings/net/
H A Dti,icssg-prueth.yaml21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
152 const: ti,am654-sr1-icssg-prueth
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_config.h174 /* SR1.0-specific bits */
208 /* SR1.0 shutdown command to stop processing at firmware.
214 /* SR1.0 pstate speed/duplex command to set speed and duplex settings
H A Dicssg_prueth_sr1.c3 /* Texas Instruments ICSSG SR1.0 Ethernet Driver
28 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG SR1.0 Ethernet driver"
30 /* SR1: Set buffer sizes for the pools. There are 8 internal queues
802 /* SR1.0 uses a dedicated high priority channel in prueth_netdev_init()
1112 dev_info(dev, "TI PRU SR1.0 ethernet driver initialized: %s EMAC mode\n", in prueth_probe()
1229 { .compatible = "ti,am654-sr1-icssg-prueth", .data = &am654_sr1_icssg_pdata },
1238 .name = "icssg-prueth-sr1",
/linux/arch/parisc/include/asm/
H A Dasmregs.h70 sr1: .reg %sr1
H A Dkgdb.h46 unsigned long sr1; member
H A Dassembly.h464 SAVE_SP (%sr1, PT_SR1 (\regs))
503 REST_SP (%sr1, PT_SR1 (\regs))
/linux/arch/powerpc/math-emu/
H A Dmath_efp.c490 FP_DECL_S(SA1); FP_DECL_S(SB1); FP_DECL_S(SR1); in do_spe_mathemu()
536 FP_ADD_S(SR1, SA1, SB1); in do_spe_mathemu()
541 FP_SUB_S(SR1, SA1, SB1); in do_spe_mathemu()
546 FP_MUL_S(SR1, SA1, SB1); in do_spe_mathemu()
551 FP_DIV_S(SR1, SA1, SB1); in do_spe_mathemu()
630 pr_debug("SR1: %d %08x %d (%d)\n", in do_spe_mathemu()
634 FP_PACK_SP(vc.wp + 1, SR1); in do_spe_mathemu()
/linux/Documentation/translations/zh_CN/arch/parisc/
H A Dregisters.rst55 SR1 临时空间寄存器
65 SR1 临时空间寄存器
/linux/Documentation/translations/zh_TW/arch/parisc/
H A Dregisters.rst55 SR1 臨時空間寄存器
65 SR1 臨時空間寄存器
/linux/Documentation/arch/parisc/
H A Dregisters.rst45 SR1 temporary space register
55 SR1 temporary space register
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-iot2050-common-pg1.dtsi46 compatible = "ti,am654-sr1-icssg-prueth";
/linux/arch/parisc/lib/
H A Dlusercopy.S58 * - sr1 already contains space of source region
97 srcspc = sr1
/linux/drivers/phy/ti/
H A Dphy-omap-usb2.c349 { .family = "AM65X", .revision = "SR1.0" }, in omap_usb2_init_errata()
357 * AM654x SR1.0 has a silicon bug due to which D+ is pulled high after in omap_usb2_init_errata()
/linux/kernel/locking/
H A Dlockdep_proc.c202 sr1 = debug_atomic_read(redundant_softirqs_on), in lockdep_stats_debug_show() local
226 seq_printf(m, " redundant softirq ons: %11llu\n", sr1); in lockdep_stats_debug_show()
/linux/drivers/phy/cadence/
H A Dcdns-dphy-rx.c163 .revision = "SR1.0",
/linux/sound/pci/
H A Dad1889.h148 #define AD_MISC_CTL_ARSR 0x0001 /* set for SR1, unset for SR0 */
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml19 The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary
/linux/arch/arm/boot/dts/ti/omap/
H A Domap34xx-omap36xx-clocks.dtsi169 sr1_fck: clock-sr1-fck@6 {

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