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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dal,alpine-msix.yaml27 al,msi-num-spis:
28 description: number of SPIs assigned to the MSI frame, relative to SPI0
36 - al,msi-num-spis
48 al,msi-num-spis = <160>;
H A Dal,alpine-msix.txt13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
24 al,msi-num-spis = <160>;
H A Darm,gic.yaml84 2 = high-to-low edge triggered (invalid for SPIs)
86 8 = active low level-sensitive (invalid for SPIs).
174 arm,msi-num-spis:
176 this property should contain the number of SPIs assigned to the
H A Dsocionext,synquacer-exiu.txt5 level-high type GICv3 SPIs.
20 - Only SPIs can use the EXIU as an interrupt parent.
H A Dti,omap4-wugen-mpu20 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
H A Dti,omap4-wugen-mpu.txt20 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs
H A Dnvidia,tegra20-ictlr.txt27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
H A Dsocionext,synquacer-exiu.yaml15 level-high type GICv3 SPIs.
H A Dti,omap4-wugen-mpu.yaml21 - Only SPIs can use the WUGEN as an interrupt parent. SGIs and PPIs are
H A Dnvidia,tegra20-ictlr.yaml24 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
H A Dqcom,mpm.yaml64 A set of MPM pin numbers and the corresponding GIC SPIs.
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmediatek,mt76x8-pinctrl.yaml42 spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,
83 spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,
266 enum: [spis]
343 const: spis
347 enum: [spis]
393 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
H A Dralink,mt7620-pinctrl.yaml47 spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -]
102 sdmode, spi, spi cs1, spis, uart0, uart1, uart2,
384 enum: [spis]
502 const: spis
506 enum: [spis]
570 p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]
H A Dimg,pistachio-pinctrl.txt64 mfio11 spis
65 mfio12 spis
66 mfio13 spis
67 mfio14 spis
H A Dstarfive,jh7110-sys-pinctrl.yaml16 includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2.dtsi373 arm,msi-num-spis = <16>;
381 arm,msi-num-spis = <16>;
389 arm,msi-num-spis = <16>;
397 arm,msi-num-spis = <16>;
405 arm,msi-num-spis = <16>;
413 arm,msi-num-spis = <16>;
421 arm,msi-num-spis = <16>;
429 arm,msi-num-spis = <16>;
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi115 arm,msi-num-spis = <32>;
122 arm,msi-num-spis = <32>;
129 arm,msi-num-spis = <32>;
136 arm,msi-num-spis = <32>;
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dpmu.yaml89 When using SPIs, specifies a list of phandles to CPU
91 the SPIs listed in the interrupts property.
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-overdrive.dts65 arm,msi-num-spis = <256>;
/freebsd/sys/arm64/arm64/
H A Dgic_v3.c413 device_printf(dev, "SPIs: %u, IDs: %u\n", in gic_v3_attach()
865 * minimum, but we also need it below for SPIs. in gic_v3_setup_intr_periph()
982 /* SPIs in distributor */ in gic_v3_disable_intr()
1033 /* SPIs in distributor */ in gic_v3_enable_intr()
1329 /* Set all SPIs to be Group 1 Non-secure */ in gic_v3_dist_init()
1496 /* Disable SPIs */ in gic_v3_redist_init()
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Darm,arch_timer_mmio.yaml17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
H A Darm,arch_timer.yaml19 to deliver its interrupts via SPIs.
/freebsd/sys/contrib/device-tree/src/arm/amazon/
H A Dalpine.dtsi172 al,msi-num-spis = <64>;
/freebsd/sys/contrib/device-tree/src/arm64/al/
H A Dalpine-v2.dtsi151 al,msi-num-spis = <160>;
/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v2.dtsi151 al,msi-num-spis = <160>;

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