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/linux/arch/powerpc/boot/dts/
H A Dicon.dts33 model = "PowerPC,440SPe";
53 compatible = "ibm,uic-440spe","ibm,uic";
63 compatible = "ibm,uic-440spe","ibm,uic";
75 compatible = "ibm,uic-440spe","ibm,uic";
87 compatible = "ibm,uic-440spe","ibm,uic";
99 compatible = "ibm,sdr-440spe";
104 compatible = "ibm,cpr-440spe";
109 compatible = "ibm,mq-440spe";
114 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
131 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
[all …]
H A Dkatmai.dts37 model = "PowerPC,440SPe";
57 compatible = "ibm,uic-440spe","ibm,uic";
67 compatible = "ibm,uic-440spe","ibm,uic";
79 compatible = "ibm,uic-440spe","ibm,uic";
91 compatible = "ibm,uic-440spe","ibm,uic";
103 compatible = "ibm,sdr-440spe";
108 compatible = "ibm,cpr-440spe";
113 compatible = "ibm,mq-440spe";
118 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
135 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
[all …]
/linux/Documentation/devicetree/bindings/perf/
H A Dspe-pmu.yaml4 $id: http://devicetree.org/schemas/perf/spe-pmu.yaml#
7 title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
23 The PPI to signal SPE events. For heterogeneous systems where SPE is only
37 spe-pmu {
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt15 - compatible : "ibm,i2o-440spe";
22 compatible = "ibm,i2o-440spe";
32 - compatible : "ibm,dma-440spe";
45 compatible = "ibm,dma-440spe";
82 - compatible : "ibm,mq-440spe";
88 compatible = "ibm,mq-440spe";
H A Dreboot.txt15 model = "PowerPC,440SPe";
/linux/tools/perf/arch/arm64/util/
H A Dmem-events.c9 …E("spe-load", "%s/ts_enable=1,pa_enable=1,load_filter=1,store_filter=0,min_latency=%u/", NULL, tru…
10 E("spe-store", "%s/ts_enable=1,pa_enable=1,load_filter=0,store_filter=1/", NULL, false, 0),
11 …E("spe-ldst", "%s/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=%u/", NULL, tru…
/linux/arch/powerpc/crypto/
H A Daes-spe-glue.c3 * Glue code for AES implementation for SPE instructions (PPC)
6 * about the SPE registers so it can run from interrupt context.
80 /* disable preemption and save users SPE registers if required */ in spe_begin()
415 .cra_driver_name = "aes-ppc-spe",
436 .base.cra_driver_name = "ecb-ppc-spe",
448 .base.cra_driver_name = "cbc-ppc-spe",
461 .base.cra_driver_name = "ctr-ppc-spe",
475 .base.cra_driver_name = "xts-ppc-spe",
515 MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS, SPE optimized");
522 MODULE_ALIAS_CRYPTO("aes-ppc-spe");
H A Dsha1-spe-asm.S3 * Fast SHA-1 implementation for SPE instruction set (PPC)
5 * This code makes use of the SPE SIMD instruction set as defined in
60 evstdw r16,24(r1); /* and save the SPE part too */ \
71 evldw r14,8(r1); /* restore SPE registers */ \
H A Daes-spe-core.S3 * Fast AES implementation for SPE instruction set (PPC)
5 * This code makes use of the SPE SIMD instruction set as defined in
14 #include "aes-spe-regs.h"
/linux/arch/powerpc/include/asm/
H A Ddcr-regs.h28 /* CPRs (440GX and 440SP/440SPe) */
32 /* SDRs (440GX and 440SP/440SPe) */
162 * DCR register offsets for 440SP/440SPe I2O/DMA controller.
169 /* 440SP/440SPe Software Reset DCR */
173 /* 440SP/440SPe Memory Queue DCR offsets */
H A Dprocessor.h192 struct_group(spe,
193 unsigned long evr[32]; /* upper 32-bits of SPE regs */
196 unsigned long spefscr; /* SPE & eFP status */
199 int used_spe; /* set if process has used spe */
/linux/arch/powerpc/kernel/
H A Dhead_85xx.S613 /* Define SPE handlers for e500v2 */
615 /* SPE Unavailable */
628 /* SPE Floating Point Data */
637 /* SPE Floating Point Round */
818 /* Note that the SPE support is closely modeled after the AltiVec
823 * Disable SPE for the task which had SPE previously,
824 * and save its SPE registers in its thread_struct.
825 * Enables SPE for use in the kernel on return.
826 * On SMP we know the SPE units are free, since we give it up every
831 mtmsr r5 /* enable use of SPE now */
[all …]
H A Dcpu_specs_44x.h187 { /* 440SPe Rev. A */
190 .cpu_name = "440SPe Rev. A",
200 { /* 440SPe Rev. B */
203 .cpu_name = "440SPe Rev. B",
H A Dsignal_32.c244 * We only save the altivec/spe registers if the process has used
245 * altivec/spe instructions at some point.
316 /* save spe registers */ in __unsafe_save_user_regs()
353 * We only save the altivec/spe registers if the process has used
354 * altivec/spe instructions at some point.
540 * Force the process to reload the spe registers from in restore_user_regs()
541 * current->thread when it next does spe instructions. in restore_user_regs()
544 BUILD_BUG_ON(sizeof(current->thread.spe) != ELF_NEVRREG * sizeof(u32)); in restore_user_regs()
547 /* restore spe registers from the stack */ in restore_user_regs()
548 unsafe_copy_from_user(&current->thread.spe, &sr->mc_vregs, in restore_user_regs()
[all …]
H A Dalign.c42 #define E4 0x40 /* SPE endianness is word */
43 #define E8 0x80 /* SPE endianness is double word */
103 * Emulate SPE loads and stores.
324 PPC_WARN_ALIGNMENT(spe, regs); in fix_alignment()
/linux/arch/powerpc/boot/dts/fsl/
H A De500v2_power_isa.dtsi47 power-isa-sp.fd; // SPE.Embedded Float Scalar Double
48 power-isa-sp.fs; // SPE.Embedded Float Scalar Single
49 power-isa-sp.fv; // SPE.Embedded Float Vector
H A De500v1_power_isa.dtsi47 power-isa-sp.fs; // SPE.Embedded Float Scalar Single
48 power-isa-sp.fv; // SPE.Embedded Float Vector
/linux/sound/soc/sdca/
H A Dsdca_functions.c343 case SDCA_CTL_TYPE_S(SPE, PRIVATE): in find_sdca_control_label()
345 case SDCA_CTL_TYPE_S(SPE, PRIVACY_POLICY): in find_sdca_control_label()
347 case SDCA_CTL_TYPE_S(SPE, PRIVACY_LOCKSTATE): in find_sdca_control_label()
349 case SDCA_CTL_TYPE_S(SPE, PRIVACY_OWNER): in find_sdca_control_label()
351 case SDCA_CTL_TYPE_S(SPE, AUTHTX_CURRENTOWNER): in find_sdca_control_label()
353 case SDCA_CTL_TYPE_S(SPE, AUTHTX_MESSAGEOFFSET): in find_sdca_control_label()
355 case SDCA_CTL_TYPE_S(SPE, AUTHTX_MESSAGELENGTH): in find_sdca_control_label()
357 case SDCA_CTL_TYPE_S(SPE, AUTHRX_CURRENTOWNER): in find_sdca_control_label()
359 case SDCA_CTL_TYPE_S(SPE, AUTHRX_MESSAGEOFFSET): in find_sdca_control_label()
361 case SDCA_CTL_TYPE_S(SPE, AUTHRX_MESSAGELENGTH): in find_sdca_control_label()
[all …]
/linux/tools/perf/util/arm-spe-decoder/
H A DBuild1 perf-util-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o arm-spe-decoder.o
/linux/arch/powerpc/platforms/44x/
H A DKconfig71 select 440SPe
218 select 440SPe
274 config 440SPe
H A Dpci.h168 * 440SPe additional DCRs
394 /* 440spe only */
408 /* 440spe port 0 only */
/linux/drivers/dma/ppc4xx/
H A Ddma.h3 * 440SPe's DMA engines support header file
119 * DMAx hardware registers (p.515 in 440SPe UM 1.22)
153 * I2O hardware registers (p.528 in 440SPe UM 1.22)
/linux/tools/perf/Documentation/
H A Dperf-mem.txt26 On Arm64 this uses SPE to sample load and store operations, therefore hardware
27 and kernel support is required. See linkperf:perf-arm-spe[1] for a setup guide.
28 Due to the statistical nature of SPE sampling, not every memory operation will
211 linkperf:perf-record[1], linkperf:perf-report[1], linkperf:perf-arm-spe[1]
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dswitch.c263 * We must flush and disable the SPE buffer for nVHE, as in __kvm_vcpu_run()
275 * above disabling of SPE and TRBE. in __kvm_vcpu_run()
334 * system may enable SPE here and make use of the TTBRs. in __kvm_vcpu_run()
/linux/arch/powerpc/kernel/ptrace/
H A DMakefile16 obj-$(CONFIG_SPE) += ptrace-spe.o

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