1*d524dac9SGrant LikelyPPC440SPe DMA/XOR (DMA Controller and XOR Accelerator) 2*d524dac9SGrant Likely 3*d524dac9SGrant LikelyDevice nodes needed for operation of the ppc440spe-adma driver 4*d524dac9SGrant Likelyare specified hereby. These are I2O/DMA, DMA and XOR nodes 5*d524dac9SGrant Likelyfor DMA engines and Memory Queue Module node. The latter is used 6*d524dac9SGrant Likelyby ADMA driver for configuration of RAID-6 H/W capabilities of 7*d524dac9SGrant Likelythe PPC440SPe. In addition to the nodes and properties described 8*d524dac9SGrant Likelybelow, the ranges property of PLB node must specify ranges for 9*d524dac9SGrant LikelyDMA devices. 10*d524dac9SGrant Likely 11*d524dac9SGrant Likely i) The I2O node 12*d524dac9SGrant Likely 13*d524dac9SGrant Likely Required properties: 14*d524dac9SGrant Likely 15*d524dac9SGrant Likely - compatible : "ibm,i2o-440spe"; 16*d524dac9SGrant Likely - reg : <registers mapping> 17*d524dac9SGrant Likely - dcr-reg : <DCR registers range> 18*d524dac9SGrant Likely 19*d524dac9SGrant Likely Example: 20*d524dac9SGrant Likely 21*d524dac9SGrant Likely I2O: i2o@400100000 { 22*d524dac9SGrant Likely compatible = "ibm,i2o-440spe"; 23*d524dac9SGrant Likely reg = <0x00000004 0x00100000 0x100>; 24*d524dac9SGrant Likely dcr-reg = <0x060 0x020>; 25*d524dac9SGrant Likely }; 26*d524dac9SGrant Likely 27*d524dac9SGrant Likely 28*d524dac9SGrant Likely ii) The DMA node 29*d524dac9SGrant Likely 30*d524dac9SGrant Likely Required properties: 31*d524dac9SGrant Likely 32*d524dac9SGrant Likely - compatible : "ibm,dma-440spe"; 33*d524dac9SGrant Likely - cell-index : 1 cell, hardware index of the DMA engine 34*d524dac9SGrant Likely (typically 0x0 and 0x1 for DMA0 and DMA1) 35*d524dac9SGrant Likely - reg : <registers mapping> 36*d524dac9SGrant Likely - dcr-reg : <DCR registers range> 37*d524dac9SGrant Likely - interrupts : <interrupt mapping for DMA0/1 interrupts sources: 38*d524dac9SGrant Likely 2 sources: DMAx CS FIFO Needs Service IRQ (on UIC0) 39*d524dac9SGrant Likely and DMA Error IRQ (on UIC1). The latter is common 40*d524dac9SGrant Likely for both DMA engines>. 41*d524dac9SGrant Likely 42*d524dac9SGrant Likely Example: 43*d524dac9SGrant Likely 44*d524dac9SGrant Likely DMA0: dma0@400100100 { 45*d524dac9SGrant Likely compatible = "ibm,dma-440spe"; 46*d524dac9SGrant Likely cell-index = <0>; 47*d524dac9SGrant Likely reg = <0x00000004 0x00100100 0x100>; 48*d524dac9SGrant Likely dcr-reg = <0x060 0x020>; 49*d524dac9SGrant Likely interrupt-parent = <&DMA0>; 50*d524dac9SGrant Likely interrupts = <0 1>; 51*d524dac9SGrant Likely #interrupt-cells = <1>; 52*d524dac9SGrant Likely #address-cells = <0>; 53*d524dac9SGrant Likely #size-cells = <0>; 54*d524dac9SGrant Likely interrupt-map = < 55*d524dac9SGrant Likely 0 &UIC0 0x14 4 56*d524dac9SGrant Likely 1 &UIC1 0x16 4>; 57*d524dac9SGrant Likely }; 58*d524dac9SGrant Likely 59*d524dac9SGrant Likely 60*d524dac9SGrant Likely iii) XOR Accelerator node 61*d524dac9SGrant Likely 62*d524dac9SGrant Likely Required properties: 63*d524dac9SGrant Likely 64*d524dac9SGrant Likely - compatible : "amcc,xor-accelerator"; 65*d524dac9SGrant Likely - reg : <registers mapping> 66*d524dac9SGrant Likely - interrupts : <interrupt mapping for XOR interrupt source> 67*d524dac9SGrant Likely 68*d524dac9SGrant Likely Example: 69*d524dac9SGrant Likely 70*d524dac9SGrant Likely xor-accel@400200000 { 71*d524dac9SGrant Likely compatible = "amcc,xor-accelerator"; 72*d524dac9SGrant Likely reg = <0x00000004 0x00200000 0x400>; 73*d524dac9SGrant Likely interrupt-parent = <&UIC1>; 74*d524dac9SGrant Likely interrupts = <0x1f 4>; 75*d524dac9SGrant Likely }; 76*d524dac9SGrant Likely 77*d524dac9SGrant Likely 78*d524dac9SGrant Likely iv) Memory Queue Module node 79*d524dac9SGrant Likely 80*d524dac9SGrant Likely Required properties: 81*d524dac9SGrant Likely 82*d524dac9SGrant Likely - compatible : "ibm,mq-440spe"; 83*d524dac9SGrant Likely - dcr-reg : <DCR registers range> 84*d524dac9SGrant Likely 85*d524dac9SGrant Likely Example: 86*d524dac9SGrant Likely 87*d524dac9SGrant Likely MQ0: mq { 88*d524dac9SGrant Likely compatible = "ibm,mq-440spe"; 89*d524dac9SGrant Likely dcr-reg = <0x040 0x020>; 90*d524dac9SGrant Likely }; 91*d524dac9SGrant Likely 92