Home
last modified time | relevance | path

Searched full:sm6350 (Results 1 – 25 of 49) sorted by relevance

12

/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm6350-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml#
7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect
13 Qualcomm RPMh-based interconnect provider on SM6350.
21 - qcom,sm6350-aggre1-noc
22 - qcom,sm6350-aggre2-noc
23 - qcom,sm6350-config-noc
24 - qcom,sm6350-dc-noc
25 - qcom,sm6350-gem-noc
26 - qcom,sm6350-mmss-noc
27 - qcom,sm6350-npu-noc
[all …]
H A Dqcom,osm-l3.yaml26 - qcom,sm6350-osm-l3
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,sm6350-pas.yaml4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml#
7 title: Qualcomm SM6350 Peripheral Authentication Service
13 Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots
19 - qcom,sm6350-adsp-pas
20 - qcom,sm6350-cdsp-pas
21 - qcom,sm6350-mpss-pas
59 - qcom,sm6350-adsp-pas
60 - qcom,sm6350-cdsp-pas
78 - qcom,sm6350-adsp-pas
94 - qcom,sm6350-cdsp-pas
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6350-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml#
7 title: Qualcomm SM6350 Display MDSS
13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
20 const: qcom,sm6350-mdss
54 const: qcom,sm6350-dpu
63 const: qcom,sm6350-dp
72 - const: qcom,sm6350-dsi-ctrl
87 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
88 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
94 compatible = "qcom,sm6350-mdss";
[all …]
H A Ddsi-controller-main.yaml33 - qcom,sm6350-dsi-ctrl
331 - qcom,sm6350-dsi-ctrl
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,dispcc-sm6350.yaml4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6350.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SM6350
14 domains on SM6350.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6350.h
20 const: qcom,sm6350-dispcc
53 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
56 compatible = "qcom,sm6350-dispcc";
H A Dqcom,sm6350-camcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6350-camcc.yaml#
7 title: Qualcomm Camera Clock & Reset Controller on SM6350
14 domains on SM6350.
16 See also:: include/dt-bindings/clock/qcom,sm6350-camcc.h
20 const: qcom,sm6350-camcc
42 compatible = "qcom,sm6350-camcc";
H A Dqcom,gcc-sm6350.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6350
14 domains on SM6350.
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6350.h
20 const: qcom,gcc-sm6350
49 compatible = "qcom,gcc-sm6350";
H A Dqcom,gpucc.yaml22 include/dt-bindings/clock/qcom,gpucc-sm6350.h
36 - qcom,sm6350-gpucc
H A Dqcom,rpmhcc.yaml32 - qcom,sm6350-rpmh-clk
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6350-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM6350 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM6350 SoC.
20 const: qcom,sm6350-tlmm
39 - $ref: "#/$defs/qcom-sm6350-tlmm-state"
42 $ref: "#/$defs/qcom-sm6350-tlmm-state"
46 qcom-sm6350-tlmm-state:
111 compatible = "qcom,sm6350-tlmm";
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6350.dtsi7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
16 #include <dt-bindings/interconnect/qcom,sm6350.h>
362 compatible = "qcom,scm-sm6350", "qcom,scm";
788 compatible = "qcom,gcc-sm6350";
802 compatible = "qcom,sm6350-ipcc", "qcom,ipcc";
811 compatible = "qcom,sm6350-qfprom", "qcom,qfprom";
830 compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5";
[all …]
H A Dsm7225.dtsi6 #include "sm6350.dtsi"
H A Dsm6350-sony-xperia-lena-pdx213.dts9 #include "sm6350.dtsi"
14 compatible = "sony,pdx213", "qcom,sm6350";
/linux/drivers/interconnect/qcom/
H A Dsm6350.c12 #include <dt-bindings/interconnect/qcom,sm6350.h>
16 #include "sm6350.h"
1679 { .compatible = "qcom,sm6350-aggre1-noc",
1681 { .compatible = "qcom,sm6350-aggre2-noc",
1683 { .compatible = "qcom,sm6350-clk-virt",
1685 { .compatible = "qcom,sm6350-compute-noc",
1687 { .compatible = "qcom,sm6350-config-noc",
1689 { .compatible = "qcom,sm6350-dc-noc",
1691 { .compatible = "qcom,sm6350-gem-noc",
1693 { .compatible = "qcom,sm6350-mmss-noc",
[all …]
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,gpi.yaml24 - qcom,sm6350-gpi-dma
38 - const: qcom,sm6350-gpi-dma
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml24 - qcom,sm6350-qmp-usb3-dp-phy
131 - qcom,sm6350-qmp-usb3-dp-phy
/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml30 - qcom,sm6350-llcc
71 - qcom,sm6350-llcc
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml37 - qcom,sm6350-ufshc
185 - qcom,sm6350-ufshc
/linux/drivers/clk/qcom/
H A Dgpucc-sm6350.c12 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
482 { .compatible = "qcom,sm6350-gpucc" },
511 .name = "sm6350-gpucc",
H A Ddispcc-sm6350.c12 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
749 { .compatible = "qcom,sm6350-dispcc" },
770 .name = "disp_cc-sm6350",
777 MODULE_DESCRIPTION("QTI DISP_CC SM6350 Driver");
/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,sdm845-refgen-regulator.yaml33 - qcom,sm6350-refgen-regulator
/linux/include/dt-bindings/power/
H A Dqcom-rpmpd.h60 /* SM6350 Power Domain Indexes */
68 /* SM6350 Power Domain Indexes */
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-qcom-hw.yaml29 - qcom,sm6350-cpufreq-hw
139 - qcom,sm6350-cpufreq-hw
/linux/drivers/pinctrl/qcom/
H A DKconfig.msm314 tristate "Qualcomm Technologies Inc SM6350 pin controller driver"
319 Technologies Inc SM6350 platform.

12