/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,sm6350-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml# 7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect 13 Qualcomm RPMh-based interconnect provider on SM6350. 21 - qcom,sm6350-aggre1-noc 22 - qcom,sm6350-aggre2-noc 23 - qcom,sm6350-config-noc 24 - qcom,sm6350-dc-noc 25 - qcom,sm6350-gem-noc 26 - qcom,sm6350-mmss-noc 27 - qcom,sm6350-npu-noc [all …]
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H A D | qcom,osm-l3.yaml | 26 - qcom,sm6350-osm-l3
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,sm6350-pas.yaml | 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml# 7 title: Qualcomm SM6350 Peripheral Authentication Service 13 Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots 19 - qcom,sm6350-adsp-pas 20 - qcom,sm6350-cdsp-pas 21 - qcom,sm6350-mpss-pas 59 - qcom,sm6350-adsp-pas 60 - qcom,sm6350-cdsp-pas 78 - qcom,sm6350-adsp-pas 94 - qcom,sm6350-cdsp-pas [all …]
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/linux/Documentation/devicetree/bindings/display/msm/ |
H A D | qcom,sm6350-mdss.yaml | 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml# 7 title: Qualcomm SM6350 Display MDSS 13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 20 const: qcom,sm6350-mdss 54 const: qcom,sm6350-dpu 63 const: qcom,sm6350-dp 72 - const: qcom,sm6350-dsi-ctrl 87 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 88 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 94 compatible = "qcom,sm6350-mdss"; [all …]
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H A D | dsi-controller-main.yaml | 33 - qcom,sm6350-dsi-ctrl 331 - qcom,sm6350-dsi-ctrl
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,dispcc-sm6350.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6350.yaml# 7 title: Qualcomm Display Clock & Reset Controller on SM6350 14 domains on SM6350. 16 See also:: include/dt-bindings/clock/qcom,dispcc-sm6350.h 20 const: qcom,sm6350-dispcc 53 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 56 compatible = "qcom,sm6350-dispcc";
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H A D | qcom,sm6350-camcc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6350-camcc.yaml# 7 title: Qualcomm Camera Clock & Reset Controller on SM6350 14 domains on SM6350. 16 See also:: include/dt-bindings/clock/qcom,sm6350-camcc.h 20 const: qcom,sm6350-camcc 42 compatible = "qcom,sm6350-camcc";
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H A D | qcom,gcc-sm6350.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SM6350 14 domains on SM6350. 16 See also:: include/dt-bindings/clock/qcom,gcc-sm6350.h 20 const: qcom,gcc-sm6350 49 compatible = "qcom,gcc-sm6350";
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H A D | qcom,gpucc.yaml | 22 include/dt-bindings/clock/qcom,gpucc-sm6350.h 36 - qcom,sm6350-gpucc
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H A D | qcom,rpmhcc.yaml | 32 - qcom,sm6350-rpmh-clk
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | qcom,sm6350-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-tlmm.yaml# 7 title: Qualcomm Technologies, Inc. SM6350 TLMM block 13 Top Level Mode Multiplexer pin controller in Qualcomm SM6350 SoC. 20 const: qcom,sm6350-tlmm 39 - $ref: "#/$defs/qcom-sm6350-tlmm-state" 42 $ref: "#/$defs/qcom-sm6350-tlmm-state" 46 qcom-sm6350-tlmm-state: 111 compatible = "qcom,sm6350-tlmm";
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm6350.dtsi | 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 11 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 16 #include <dt-bindings/interconnect/qcom,sm6350.h> 362 compatible = "qcom,scm-sm6350", "qcom,scm"; 788 compatible = "qcom,gcc-sm6350"; 802 compatible = "qcom,sm6350-ipcc", "qcom,ipcc"; 811 compatible = "qcom,sm6350-qfprom", "qcom,qfprom"; 830 compatible = "qcom,sm6350-sdhci", "qcom,sdhci-msm-v5"; [all …]
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H A D | sm7225.dtsi | 6 #include "sm6350.dtsi"
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H A D | sm6350-sony-xperia-lena-pdx213.dts | 9 #include "sm6350.dtsi" 14 compatible = "sony,pdx213", "qcom,sm6350";
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/linux/drivers/interconnect/qcom/ |
H A D | sm6350.c | 12 #include <dt-bindings/interconnect/qcom,sm6350.h> 16 #include "sm6350.h" 1679 { .compatible = "qcom,sm6350-aggre1-noc", 1681 { .compatible = "qcom,sm6350-aggre2-noc", 1683 { .compatible = "qcom,sm6350-clk-virt", 1685 { .compatible = "qcom,sm6350-compute-noc", 1687 { .compatible = "qcom,sm6350-config-noc", 1689 { .compatible = "qcom,sm6350-dc-noc", 1691 { .compatible = "qcom,sm6350-gem-noc", 1693 { .compatible = "qcom,sm6350-mmss-noc", [all …]
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/linux/Documentation/devicetree/bindings/dma/ |
H A D | qcom,gpi.yaml | 24 - qcom,sm6350-gpi-dma 38 - const: qcom,sm6350-gpi-dma
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,sc8280xp-qmp-usb43dp-phy.yaml | 24 - qcom,sm6350-qmp-usb3-dp-phy 131 - qcom,sm6350-qmp-usb3-dp-phy
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/linux/Documentation/devicetree/bindings/cache/ |
H A D | qcom,llcc.yaml | 30 - qcom,sm6350-llcc 71 - qcom,sm6350-llcc
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/linux/Documentation/devicetree/bindings/ufs/ |
H A D | qcom,ufs.yaml | 37 - qcom,sm6350-ufshc 185 - qcom,sm6350-ufshc
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/linux/drivers/clk/qcom/ |
H A D | gpucc-sm6350.c | 12 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 482 { .compatible = "qcom,sm6350-gpucc" }, 511 .name = "sm6350-gpucc",
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H A D | dispcc-sm6350.c | 12 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 749 { .compatible = "qcom,sm6350-dispcc" }, 770 .name = "disp_cc-sm6350", 777 MODULE_DESCRIPTION("QTI DISP_CC SM6350 Driver");
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | qcom,sdm845-refgen-regulator.yaml | 33 - qcom,sm6350-refgen-regulator
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/linux/include/dt-bindings/power/ |
H A D | qcom-rpmpd.h | 60 /* SM6350 Power Domain Indexes */ 68 /* SM6350 Power Domain Indexes */
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/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | cpufreq-qcom-hw.yaml | 29 - qcom,sm6350-cpufreq-hw 139 - qcom,sm6350-cpufreq-hw
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/linux/drivers/pinctrl/qcom/ |
H A D | Kconfig.msm | 314 tristate "Qualcomm Technologies Inc SM6350 pin controller driver" 319 Technologies Inc SM6350 platform.
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