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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
21 - qcom,sm6115-lpass-lpi-pinctrl
25 - const: qcom,sm6115-lpass-lpi-pinctrl
43 - $ref: "#/$defs/qcom-sm6115-lpass-state"
46 $ref: "#/$defs/qcom-sm6115-lpass-state"
50 qcom-sm6115-lpass-state:
91 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
H A Dqcom,sm6115-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115
18 const: qcom,sm6115-tlmm
37 - $ref: "#/$defs/qcom-sm6115-tlmm-state"
40 $ref: "#/$defs/qcom-sm6115-tlmm-state"
44 qcom-sm6115-tlmm-state:
100 compatible = "qcom,sm6115-tlmm";
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
7 title: Qualcomm SM6115 Display MDSS
15 are mentioned for SM6115 target.
21 const: qcom,sm6115-mdss
49 const: qcom,sm6115-dpu
59 - const: qcom,sm6115-dsi-ctrl
80 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
81 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
89 compatible = "qcom,sm6115-mdss";
106 compatible = "qcom,sm6115-dpu";
[all …]
H A Dqcom,sm6115-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
7 title: Qualcomm Display DPU on SM6115
16 const: qcom,sm6115-dpu
57 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
58 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
62 compatible = "qcom,sm6115-dpu";
/linux/drivers/clk/qcom/
H A Dlpasscc-sm6115.c13 #include <dt-bindings/clock/qcom,sm6115-lpasscc.h>
56 .compatible = "qcom,sm6115-lpassaudiocc",
59 .compatible = "qcom,sm6115-lpasscc",
76 .name = "lpasscc-sm6115",
83 MODULE_DESCRIPTION("QTI LPASSCC SM6115 Driver");
H A Dgpucc-sm6115.c12 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
467 { .compatible = "qcom,sm6115-gpucc" },
496 .name = "sm6115-gpucc",
502 MODULE_DESCRIPTION("QTI GPU_CC SM6115 Driver");
H A DMakefile170 obj-$(CONFIG_SM_DISPCC_6115) += dispcc-sm6115.o
181 obj-$(CONFIG_SM_GCC_6115) += gcc-sm6115.o
195 obj-$(CONFIG_SM_GPUCC_6115) += gpucc-sm6115.o
207 obj-$(CONFIG_SM_LPASSCC_6115) += lpasscc-sm6115.o
H A Ddispcc-sm6115.c15 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
575 { .compatible = "qcom,sm6115-dispcc" },
606 .name = "dispcc-sm6115",
612 MODULE_DESCRIPTION("Qualcomm SM6115 Display Clock controller");
H A DKconfig1483 tristate "SM6115 Display Clock Controller"
1489 SM6115/SM4250 devices.
1604 tristate "SM6115 and SM4250 Global Clock Controller"
1609 Support for the global clock controller on SM6115 and SM4250 devices.
1745 tristate "SM6115 Graphics Clock Controller"
1750 Support for the graphics clock controller on SM6115 devices.
1866 tristate "SM6115 Low Power Audio Subsystem (LPASS) Clock Controller"
1871 Support for the LPASS clock controller on SM6115 devices.
H A Dgcc-sm6115.c15 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
3493 { .compatible = "qcom,gcc-sm6115" },
3523 .name = "gcc-sm6115",
3540 MODULE_DESCRIPTION("QTI GCC SM6115 and SM4250 Driver");
3542 MODULE_ALIAS("platform:gcc-sm6115");
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115p-lenovo-j606f.dts8 #include "sm6115.dtsi"
13 compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
73 firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
133 firmware-name = "qcom/sm6115/LENOVO/J606F/adsp.mbn";
138 firmware-name = "qcom/sm6115/LENOVO/J606F/cdsp.mbn";
143 firmware-name = "qcom/sm6115/LENOVO/J606F/modem.mbn";
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,ufs.yaml23 - qcom,sm6115-ufshc
38 - qcom,sm6115-ufshc
129 - qcom,sm6115-ufshc
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-ufs-phy.yaml26 - const: qcom,sm6115-qmp-ufs-phy
51 - qcom,sm6115-qmp-ufs-phy
121 - qcom,sm6115-qmp-ufs-phy
H A Dqcom,qusb2-phy.yaml33 - qcom,sm6115-qusb2-phy
/linux/drivers/interconnect/qcom/
H A Dsm6115.c8 #include <dt-bindings/interconnect/qcom,sm6115.h>
1392 { .compatible = "qcom,sm6115-bimc", .data = &sm6115_bimc },
1393 { .compatible = "qcom,sm6115-clk-virt", .data = &sm6115_clk_virt },
1394 { .compatible = "qcom,sm6115-cnoc", .data = &sm6115_config_noc },
1395 { .compatible = "qcom,sm6115-mmrt-virt", .data = &sm6115_mmrt_virt },
1396 { .compatible = "qcom,sm6115-mmnrt-virt", .data = &sm6115_mmnrt_virt },
1397 { .compatible = "qcom,sm6115-snoc", .data = &sm6115_sys_noc },
1406 .name = "qnoc-sm6115",
1424 MODULE_DESCRIPTION("SM6115 NoC driver");
/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-rx-macro.yaml17 - qcom,sm6115-lpass-rx-macro
90 - qcom,sm6115-lpass-rx-macro
H A Dqcom,lpass-tx-macro.yaml17 - qcom,sm6115-lpass-tx-macro
114 - qcom,sm6115-lpass-tx-macro
H A Dqcom,lpass-va-macro.yaml17 - qcom,sm6115-lpass-va-macro
108 const: qcom,sm6115-lpass-va-macro
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,rpmcc.yaml50 - qcom,rpmcc-sm6115
136 - qcom,rpmcc-sm6115
/linux/drivers/pinctrl/qcom/
H A DMakefile66 obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
67 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
H A DKconfig.msm466 tristate "Qualcomm SM6115,SM4250 pin controller driver"
472 Technologies Inc SM6115 and SM4250 platforms.
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml30 # SDM845, SM6115, SM8150, SM8250 and QCM2290
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml45 - qcom,sm6115-apcs-hmss-global
/linux/drivers/soc/qcom/
H A Dsmd-rpm.c239 { .compatible = "qcom,rpm-sm6115" },
/linux/Documentation/devicetree/bindings/thermal/
H A Dqcom-tsens.yaml81 - qcom,sm6115-tsens

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