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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm6115.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6115.yaml#
7 title: Qualcomm SM6115 Network-On-Chip interconnect
13 The Qualcomm SM6115 interconnect providers support adjusting the
19 - qcom,sm6115-bimc
20 - qcom,sm6115-cnoc
21 - qcom,sm6115-snoc
47 - qcom,sm6115-clk-virt
48 - qcom,sm6115-mmrt-virt
49 - qcom,sm6115-mmnrt-virt
65 const: qcom,sm6115-cnoc
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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sm6115-mdss.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
7 title: Qualcomm SM6115 Display MDSS
15 are mentioned for SM6115 target.
21 const: qcom,sm6115-mdss
49 const: qcom,sm6115-dpu
59 - const: qcom,sm6115-dsi-ctrl
80 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
81 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
89 compatible = "qcom,sm6115-mdss";
106 compatible = "qcom,sm6115-dpu";
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H A Dqcom,sm6115-dpu.yaml4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#
7 title: Qualcomm Display DPU on SM6115
16 const: qcom,sm6115-dpu
57 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
58 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
62 compatible = "qcom,sm6115-dpu";
H A Ddsi-controller-main.yaml31 - qcom,sm6115-dsi-ctrl
402 - qcom,sm6115-dsi-ctrl
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
37 - $ref: "#/$defs/qcom-sm6115-lpass-state"
40 $ref: "#/$defs/qcom-sm6115-lpass-state"
44 qcom-sm6115-lpass-state:
86 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
H A Dqcom,sm6115-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115
18 const: qcom,sm6115-tlmm
37 - $ref: "#/$defs/qcom-sm6115-tlmm-state"
40 $ref: "#/$defs/qcom-sm6115-tlmm-state"
44 qcom-sm6115-tlmm-state:
100 compatible = "qcom,sm6115-tlmm";
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm6115-dispcc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#
7 title: Qualcomm Display Clock Controller for SM6115
14 on SM6115.
16 See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h
21 - qcom,sm6115-dispcc
44 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
46 compatible = "qcom,sm6115-dispcc";
H A Dqcom,sm6115-gpucc.yaml4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
21 - qcom,sm6115-gpucc
40 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
48 compatible = "qcom,sm6115-gpucc";
H A Dqcom,gcc-sm6115.yaml4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250
16 See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h
20 const: qcom,gcc-sm6115
47 compatible = "qcom,gcc-sm6115";
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6115p-lenovo-j606f.dts8 #include "sm6115.dtsi"
13 compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
72 firmware-name = "qcom/sm6115/LENOVO/J606F/a610_zap.mbn";
133 firmware-name = "qcom/sm6115/LENOVO/J606F/adsp.mbn";
138 firmware-name = "qcom/sm6115/LENOVO/J606F/cdsp.mbn";
143 firmware-name = "qcom/sm6115/LENOVO/J606F/modem.mbn";
H A Dsm6115-fxtec-pro1x.dts8 #include "sm6115.dtsi"
17 compatible = "fxtec,pro1x", "qcom,sm6115";
126 firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn";
295 firmware-name = "qcom/sm6115/Fxtec/QX1050/adsp.mbn";
300 firmware-name = "qcom/sm6115/Fxtec/QX1050/cdsp.mbn";
305 firmware-name = "qcom/sm6115/Fxtec/QX1050/modem.mbn";
H A Dqcm2290.dtsi5 * Based on sm6115.dtsi and previous efforts by Shawn Guo & Loic Poulain.
1802 compatible = "qcom,qcm2290-mpss-pas", "qcom,sm6115-mpss-pas";
1839 compatible = "qcom,qcm2290-adsp-pas", "qcom,sm6115-adsp-pas";
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm6115-lpass-lpi.c139 { .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
146 .name = "qcom-sm6115-lpass-lpi-pinctrl",
154 MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
H A DKconfig81 tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
87 (Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform.
H A Dpinctrl-sm6115.c900 { .compatible = "qcom,sm6115-tlmm", },
906 .name = "sm6115-tlmm",
925 MODULE_DESCRIPTION("QTI sm6115 tlmm driver");
/linux/drivers/clk/qcom/
H A Dgpucc-sm6115.c13 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
468 { .compatible = "qcom,sm6115-gpucc" },
497 .name = "sm6115-gpucc",
503 MODULE_DESCRIPTION("QTI GPU_CC SM6115 Driver");
H A Dgcc-sm6115.c15 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
3492 { .compatible = "qcom,gcc-sm6115" },
3522 .name = "gcc-sm6115",
3539 MODULE_DESCRIPTION("QTI GCC SM6115 and SM4250 Driver");
3541 MODULE_ALIAS("platform:gcc-sm6115");
/linux/Documentation/devicetree/bindings/dma/
H A Dqcom,bam-dma.yaml28 # SDM845, SM6115, SM8150, SM8250 and QCM2290
/linux/Documentation/devicetree/bindings/nvmem/
H A Dqcom,qfprom.yaml46 - qcom,sm6115-qfprom
/linux/Documentation/devicetree/bindings/watchdog/
H A Dqcom-wdt.yaml41 - qcom,apss-wdt-sm6115
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,smd-rpm.yaml60 - qcom,rpm-sm6115
/linux/drivers/soc/qcom/
H A Dsmd-rpm.c239 { .compatible = "qcom,rpm-sm6115" },
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,rpm-proc.yaml90 - qcom,sm6115-rpm-proc
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_cfg.c174 { 0x5e94000 }, /* QCM2290 / SM6115 / SM6125 / SM6375 */
/linux/drivers/gpu/drm/msm/
H A Dmsm_mdss.c747 { .compatible = "qcom,sm6115-mdss", .data = &sm6115_data },

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