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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sdx55-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx55-pinctrl.yaml#
7 title: Qualcomm Technologies, Inc. SDX55 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SDX55 SoC.
17 const: qcom,sdx55-pinctrl
32 - $ref: "#/$defs/qcom-sdx55-tlmm-state"
35 $ref: "#/$defs/qcom-sdx55-tlmm-state"
39 qcom-sdx55-tlmm-state:
105 compatible = "qcom,sdx55-pinctrl";
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,a7pll.yaml13 The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high
19 - qcom,sdx55-a7pll
46 compatible = "qcom,sdx55-a7pll";
H A Dqcom,rpmhcc.yaml37 - qcom,sdx55-rpmh-clk
/linux/drivers/clk/qcom/
H A Dapcs-sdx55.c3 * Qualcomm SDX55 APCS clock controller driver
110 * for CPUs and the SDX55 platform lacks hardware specific CPUFreq in qcom_apcs_sdx55_clk_probe()
140 .name = "qcom-sdx55-acps-clk",
147 MODULE_DESCRIPTION("Qualcomm SDX55 APCS clock driver");
H A DKconfig349 tristate "A7 PLL driver for SDX55 and SDX65"
353 Support for the A7 PLL on SDX55 and SDX65 devices. It provides the CPU with
355 Say Y if you want to support higher CPU frequencies on SDX55 and SDX65
380 tristate "SDX55 and SDX65 APCS Clock Controller"
385 Support for the APCS Clock Controller on SDX55, SDX65 platforms. The
388 such as SDX55, SDX65.
1350 tristate "SDX55 Global Clock Controller"
1355 Support for the global clock controller on SDX55 devices.
H A Da7-pll.c85 { .compatible = "qcom,sdx55-a7pll" },
H A DMakefile103 obj-$(CONFIG_QCOM_CLK_APCS_SDX55) += apcs-sdx55.o
156 obj-$(CONFIG_SDX_GCC_55) += gcc-sdx55.o
H A Dgcc-sdx55.c12 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
1601 { .compatible = "qcom,gcc-sdx55" },
1625 .name = "gcc-sdx55",
1642 MODULE_DESCRIPTION("QTI GCC SDX55 Driver");
H A Dclk-rpmh.c1112 { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
/linux/Documentation/devicetree/bindings/mailbox/
H A Dqcom,apcs-kpss-global.yaml63 - qcom,sdx55-apcs-gcc
154 sdx55-apcs-clock-controller:
214 - qcom,sdx55-apcs-gcc
216 $ref: '#/$defs/sdx55-apcs-clock-controller'
219 $ref: '#/$defs/sdx55-apcs-clock-controller'
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55-mtp.dts9 #include "qcom-sdx55.dtsi"
15 model = "Qualcomm Technologies, Inc. SDX55 MTP";
16 compatible = "qcom,sdx55-mtp", "qcom,sdx55";
H A Dqcom-sdx65.dtsi287 compatible = "qcom,sdx55-nand";
303 compatible = "qcom,sdx65-pcie-ep", "qcom,sdx55-pcie-ep";
438 compatible = "qcom,sdx55-mpss-pas";
647 compatible = "qcom,sdx55-a7pll";
655 compatible = "qcom,sdx55-apcs-gcc", "syscon";
/linux/drivers/interconnect/qcom/
H A Dsdx55.c3 * Qualcomm SDX55 interconnect driver
15 #include <dt-bindings/interconnect/qcom,sdx55.h>
892 { .compatible = "qcom,sdx55-mc-virt",
894 { .compatible = "qcom,sdx55-mem-noc",
896 { .compatible = "qcom,sdx55-system-noc",
906 .name = "qnoc-sdx55",
913 MODULE_DESCRIPTION("Qualcomm SDX55 NoC driver");
/linux/drivers/bus/mhi/ep/
H A DKconfig10 such as SDX55 modem connected to the host machine over PCIe.
/linux/drivers/bus/mhi/host/
H A DKconfig30 Qualcomm SDX55 based PCIe modems.
/linux/drivers/pci/endpoint/functions/
H A DKconfig48 devices such as SDX55.
/linux/include/dt-bindings/interconnect/
H A Dqcom,sdx55.h3 * Qualcomm SDX55 interconnect IDs
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml37 - qcom,sdx55-qmp-pcie-phy
171 - qcom,sdx55-qmp-pcie-phy
/linux/drivers/pinctrl/qcom/
H A DKconfig.msm419 tristate "Qualcomm SDX55 pin controller driver"
425 Technologies Inc SDX55 platform.
H A DMakefile60 obj-$(CONFIG_PINCTRL_SDX55) += pinctrl-sdx55.o
/linux/drivers/pci/controller/dwc/
H A Dpcie-qcom-ep.c967 { .compatible = "qcom,sdx55-pcie-ep", },
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-usb.c2508 .compatible = "qcom,sdx55-qmp-usb3-uni-phy",
H A Dphy-qcom-qmp-pcie.c6442 .compatible = "qcom,sdx55-qmp-pcie-phy",