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/linux/drivers/mmc/host/
H A DMakefile13 obj-$(CONFIG_MMC_SDHCI) += sdhci.o
14 obj-$(CONFIG_MMC_SDHCI_UHS2) += sdhci-uhs2.o
15 obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
16 sdhci-pci-y += sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
17 sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
18 obj-$(CONFIG_MMC_SDHCI_ACPI) += sdhci-acpi.o
19 obj-$(CONFIG_MMC_SDHCI_PXAV3) += sdhci-pxav3.o
20 obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-pxav2.o
21 obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
23 obj-$(CONFIG_MMC_SDHCI_MILBEAUT) += sdhci-milbeaut.o
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H A DKconfig85 need to overwrite SDHCI IO memory accessors.
93 and performing I/O to a SDHCI controller through a bus that
99 This is the case for the Nintendo Wii SDHCI.
102 tristate "UHS2 support on SDHCI controller" if COMPILE_TEST
105 This option is selected by SDHCI controller drivers that want to
111 tristate "SDHCI support on PCI bus"
131 proprietary controller is unnecessary because the SDHCI driver
140 tristate "SDHCI support for ACPI enumerated SDHCI controllers"
144 This selects support for ACPI enumerated SDHCI controllers,
153 tristate "SDHCI platform and OF driver helper"
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H A Dsdhci-of-aspeed.c18 #include "sdhci-pltfm.h"
112 struct aspeed_sdhci *sdhci, in aspeed_sdc_configure_8bit_mode() argument
121 info |= sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
123 info &= ~sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
217 struct aspeed_sdhci *sdhci; in aspeed_sdhci_configure_phase() local
221 sdhci = sdhci_pltfm_priv(sdhci_priv(host)); in aspeed_sdhci_configure_phase()
223 if (!sdhci->phase_desc) in aspeed_sdhci_configure_phase()
226 params = &sdhci->phase_map.phase[host->timing]; in aspeed_sdhci_configure_phase()
228 aspeed_sdc_set_phase_taps(sdhci->parent, sdhci->phase_desc, taps); in aspeed_sdhci_configure_phase()
240 struct aspeed_sdhci *sdhci; in aspeed_sdhci_set_clock() local
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H A Dsdhci-pltfm.c3 * sdhci-pltfm.c Support for SDHCI platform devices
14 * SDHCI platform devices
16 * Inspired by sdhci-pci.c, by Pierre Ossman
25 #include "sdhci-pltfm.h"
44 if (device_property_present(dev, "sdhci,wp-inverted") || in sdhci_wp_inverted()
78 if (device_property_present(dev, "sdhci,auto-cmd12")) in sdhci_get_property()
81 if (device_property_present(dev, "sdhci,1-bit-only") || in sdhci_get_property()
234 pr_info("sdhci-pltfm: SDHCI platform and OF driver helper\n"); in sdhci_pltfm_drv_init()
245 MODULE_DESCRIPTION("SDHCI platform and OF driver helper");
/linux/Documentation/devicetree/bindings/mmc/
H A Dbrcm,sdhci-brcmstb.yaml4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
7 title: Broadcom BRCMSTB/BMIPS SDHCI Controller
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
20 - const: brcm,sdhci-brcmstb
23 - brcm,bcm2712-sdhci
24 - brcm,bcm74165b0-sdhci
25 - brcm,bcm7445-sdhci
26 - brcm,bcm7425-sdhci
27 - const: brcm,sdhci-brcmstb
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H A Darasan,sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#
7 title: Arasan SDHCI Controller
18 const: arasan,sdhci-5.1
45 - const: arasan,sdhci-8.9a # generic Arasan SDHCI 8.9a PHY
46 - const: arasan,sdhci-4.9a # generic Arasan SDHCI 4.9a PHY
47 - const: arasan,sdhci-5.1 # generic Arasan SDHCI 5.1 PHY
49 - const: rockchip,rk3399-sdhci-5.1 # rk3399 eMMC PHY
50 - const: arasan,sdhci-5.1
55 - const: xlnx,zynqmp-8.9a # ZynqMP SDHCI 8.9a PHY
56 - const: arasan,sdhci-8.9a
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H A Dnvidia,tegra20-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
26 - nvidia,tegra114-sdhci
27 - nvidia,tegra124-sdhci
28 - nvidia,tegra210-sdhci
29 - nvidia,tegra186-sdhci
30 - nvidia,tegra194-sdhci
33 - const: nvidia,tegra132-sdhci
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H A Daspeed,sdhci.yaml5 $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#
42 "^sdhci@[0-9a-f]+$":
50 - aspeed,ast2400-sdhci
51 - aspeed,ast2500-sdhci
52 - aspeed,ast2600-sdhci
55 description: The SDHCI registers
62 sdhci,auto-cmd12:
92 sdhci0: sdhci@100 {
93 compatible = "aspeed,ast2500-sdhci";
96 sdhci,auto-cmd12;
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H A Dbrcm,iproc-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/brcm,iproc-sdhci.yaml#
7 title: Broadcom IPROC SDHCI controller
20 - brcm,bcm2835-sdhci
22 - brcm,sdhci-iproc-cygnus
23 - brcm,sdhci-iproc
24 - brcm,bcm7211a0-sdhci
35 Handle to core clock for the sdhci controller.
37 sdhci,auto-cmd12:
56 compatible = "brcm,sdhci-iproc-cygnus";
61 sdhci,auto-cmd12;
H A Dsdhci-omap.txt1 * TI OMAP SDHCI Controller
8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
13 Should be "ti,k2g-sdhci" for K2G
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
36 compatible = "ti,dra7-sdhci";
H A Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci";
77 mmc1: sdhci@9080000 {
78 compatible = "st,sdhci-stih407", "st,sdhci";
93 mmc0: sdhci@9060000 {
94 compatible = "st,sdhci-stih407", "st,sdhci";
H A Dsdhci.txt7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
H A Dsdhci-common.yaml4 $id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#
7 title: SDHCI Controller Common Properties
13 Common properties present on Secure Digital Host Controller Interface (SDHCI)
17 sdhci-caps:
20 Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES
23 sdhci-caps-mask:
26 Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and
H A Dsdhci-am654.yaml5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
14 - $ref: sdhci-common.yaml#
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
22 - ti,am64-sdhci-8bit
23 - ti,am654-sdhci-5.1
24 - ti,j721e-sdhci-4bit
25 - ti,j721e-sdhci-8bit
27 - const: ti,j7200-sdhci-8bit
28 - const: ti,j721e-sdhci-8bit
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H A Dmicrochip,sdhci-pic32.txt1 * Microchip PIC32 SDHCI Controller
4 and the properties used by the sdhci-pic32 driver.
7 - compatible: Should be "microchip,pic32mzda-sdhci"
14 - pinctrl-0: Phandle referencing pin configuration of the SDHCI controller.
19 sdhci@1f8ec000 {
20 compatible = "microchip,pic32mzda-sdhci";
H A Dfujitsu,sdhci-fujitsu.yaml4 $id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#
7 title: Fujitsu/Socionext SDHCI controller (F_SDH30)
19 - const: socionext,synquacer-sdhci
20 - const: fujitsu,mb86s70-sdhci-3.0
22 - fujitsu,mb86s70-sdhci-3.0
60 compatible = "fujitsu,mb86s70-sdhci-3.0";
H A Dsdhci-pxa.yaml4 $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
7 title: Marvell PXA SDHCI v1/v2/v3
18 const: marvell,armada-380-sdhci
40 - marvell,armada-380-sdhci
48 - const: sdhci
109 compatible = "marvell,armada-380-sdhci";
110 reg-names = "sdhci", "mbus", "conf-sdio3";
H A Dsdhci-spear.txt1 * SPEAr SDHCI Controller
4 and the properties used by the sdhci-spear driver.
7 - compatible: "st,spear300-sdhci"
14 sdhci@fc000000 {
15 compatible = "st,spear300-sdhci";
H A Dsamsung,s3c6410-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#
7 title: Samsung SoC SDHCI Controller
16 - samsung,s3c6410-sdhci
17 - samsung,exynos4210-sdhci
52 - samsung,exynos4210-sdhci
71 compatible = "samsung,exynos4210-sdhci";
H A Dnpcm,sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/npcm,sdhci.yaml#
7 title: NPCM SDHCI Controller
18 - nuvoton,npcm750-sdhci
19 - nuvoton,npcm845-sdhci
41 compatible = "nuvoton,npcm750-sdhci";
H A Dbrcm,kona-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/brcm,kona-sdhci.yaml#
7 title: Broadcom Kona family SDHCI controller
13 - $ref: sdhci-common.yaml#
17 const: brcm,kona-sdhci
43 compatible = "brcm,kona-sdhci";
H A Dsdhci-milbeaut.txt1 * SOCIONEXT Milbeaut SDHCI controller
7 - compatible: "socionext,milbeaut-m10v-sdhci-3.0"
12 "iface" - clock used for sdhci interface
13 "core" - core clock for sdhci controller
21 compatible = "socionext,milbeaut-m10v-sdhci-3.0";
H A Dmarvell,dove-sdhci.yaml4 $id: http://devicetree.org/schemas/mmc/marvell,dove-sdhci.yaml#
7 title: Marvell sdhci-dove controller
18 const: marvell,dove-sdhci
40 compatible = "marvell,dove-sdhci";
/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dakebono.txt14 1.a) The Secure Digital Host Controller Interface (SDHCI) node
20 - compatible : should be "ibm,476gtr-sdhci","generic-sdhci".
21 - reg : should contain the SDHCI registers location and length.
22 - interrupts : should contain the SDHCI interrupt.
/linux/arch/arm/mach-s3c/
H A Dsdhci.h11 * S3C Platform - SDHCI (HSMMC) platform data definitions
17 #include <linux/platform_data/mmc-sdhci-s3c.h>
20 /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
28 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
31 * Register the given platform data for use withe S3C SDHCI device.
55 /* S3C64XX SDHCI setup */

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