Searched +full:sd +full:- +full:fec (Results  1 – 19 of 19) sorted by relevance
| /linux/Documentation/misc-devices/ | 
| H A D | xilinx_sdfec.rst | 1 .. SPDX-License-Identifier: GPL-2.0+4 Xilinx SD-FEC Driver
 10 This driver supports SD-FEC Integrated Block for Zynq |Ultrascale+ (TM)| RFSoCs.
 15 …of SD-FEC core features, see the `SD-FEC Product Guide (PG256) <https://www.xilinx.com/cgi-bin/doc…
 19   - Retrieval of the Integrated Block configuration and status information
 20   - Configuration of LDPC codes
 21   - Configuration of Turbo decoding
 22   - Monitoring errors
 24 Missing features, known issues, and limitations of the SD-FEC driver are as
 27   - Only allows a single open file handler to any instance of the driver at any time
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| /linux/include/uapi/misc/ | 
| H A D | xilinx_sdfec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */3  * Xilinx SD-FEC
 26 	(XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
 28 	(XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
 30 	(XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
 33  * enum xsdfec_code - Code Type.
 47  * enum xsdfec_order - Order
 49  * @XSDFEC_OUT_OF_ORDER: Out-of-order execution of blocks.
 60  * enum xsdfec_turbo_alg - Turbo Algorithm Type.
 61  * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
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| /linux/Documentation/devicetree/bindings/misc/ | 
| H A D | xlnx,sd-fec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---
 4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Cvetic, Dragan <dragan.cvetic@amd.com>
 11   - Erim, Salih <salih.erim@amd.com>
 15   which provides high-throughput LDPC and Turbo Code implementations.
 17   customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
 18   principally covers codes used by LTE. The FEC Engine offers significant
 23     const: xlnx,sd-fec-1.1
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| /linux/arch/arm/boot/dts/nxp/imx/ | 
| H A D | imx6qdl-skov-cpu.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)5 #include <dt-bindings/gpio/gpio.h>
 6 #include <dt-bindings/leds/common.h>
 10 		stdout-path = &uart2;
 16 		ethernet0 = &fec;
 19 		mdio-gpio0 = &mdio;
 28 	iio-hwmon {
 29 		compatible = "iio-hwmon";
 30 		io-channels = <&adc 0>, /* 24V */
 35 		compatible = "gpio-leds";
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| H A D | imx6qp-prtwd3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT7 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 16 		stdout-path = &uart4;
 29 	clock_ksz8081: clock-ksz8081 {
 30 		compatible = "fixed-clock";
 31 		#clock-cells = <0>;
 32 		clock-frequency = <50000000>;
 35 	clock_ksz9031: clock-ksz9031 {
 36 		compatible = "fixed-clock";
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| H A D | imx6qdl-mba6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only5  * Copyright 2013-2021 TQ-Systems GmbH
 6  * Author: Markus Niebel <Markus.Niebel@tq-group.com>
 9 #include <dt-bindings/clock/imx6qdl-clock.h>
 10 #include <dt-bindings/gpio/gpio.h>
 11 #include <dt-bindings/input/input.h>
 12 #include <dt-bindings/sound/fsl-imx-audmux.h>
 18 		/delete-property/ mmc2;
 19 		/delete-property/ mmc3;
 24 		stdout-path = &uart2;
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| H A D | imx51-zii-scu3-esb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;
 13 	compatible = "zii,imx51-scu3-esb", "fsl,imx51";
 16 		stdout-path = &uart1;
 25 	usb_vbus: regulator-usb-vbus {
 26 		compatible = "regulator-fixed";
 27 		regulator-name = "usb_vbus";
 28 		regulator-min-microvolt = <5000000>;
 29 		regulator-max-microvolt = <5000000>;
 31 		pinctrl-names = "default";
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| H A D | imx6qdl-ts4900.dtsi | 4  * This file is dual-licensed: you can use it either under the terms42 #include <dt-bindings/gpio/gpio.h>
 43 #include <dt-bindings/interrupt-controller/irq.h>
 47 		ethernet0 = &fec;
 51 		pinctrl-names = "default";
 52 		pinctrl-0 = <&pinctrl_leds1>;
 53 		compatible = "gpio-leds";
 55 		green-led {
 56 			label = "green-led";
 58 			default-state = "on";
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| H A D | imx6dl-lanmcu.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later7 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 9 #include <dt-bindings/leds/common.h>
 17 		stdout-path = &uart4;
 20 	clock_ksz8081: clock-ksz8081 {
 21 		compatible = "fixed-clock";
 22 		#clock-cells = <0>;
 23 		clock-frequency = <50000000>;
 24 		clock-output-names = "enet_ref_pad";
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| H A D | imx6dl-plym2m.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT7 /dts-v1/;
 8 #include <dt-bindings/gpio/gpio.h>
 9 #include <dt-bindings/leds/common.h>
 17 		stdout-path = &uart4;
 21 		compatible = "pwm-backlight";
 23 		brightness-levels = <0 1000>;
 24 		num-interpolated-steps = <20>;
 25 		default-brightness-level = <19>;
 26 		power-supply = <®_12v0>;
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| H A D | imx6qdl-zii-rdu2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)3  * Copyright (C) 2016-2017 Zodiac Inflight Innovations
 6 #include <dt-bindings/gpio/gpio.h>
 7 #include <dt-bindings/sound/fsl-imx-audmux.h>
 11 		stdout-path = &uart1;
 15 		mdio-gpio0 = &mdio1;
 20 		compatible = "virtual,mdio-gpio";
 21 		#address-cells = <1>;
 22 		#size-cells = <0>;
 23 		pinctrl-names = "default";
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| /linux/arch/arm64/boot/dts/freescale/ | 
| H A D | imx8mp-dhcom-pdk2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6  * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
 7  * DHCOM PCB number: 660-100 or newer
 8  * PDK2 PCB number: 516-400 or newer
 11 /dts-v1/;
 13 #include <dt-bindings/leds/common.h>
 14 #include <dt-bindings/phy/phy-imx8-pcie.h>
 15 #include "imx8mp-dhcom-som.dtsi"
 19 	compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
 23 		stdout-path = &uart1;
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| H A D | imx8mp-dhcom-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.03  * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
 10 	compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
 14 		ethernet1 = &fec;
 22 		/* Memory size 512 MiB..8 GiB will be filled by U-Boot */
 26 	reg_eth_vio: regulator-eth-vio {
 27 		compatible = "regulator-fixed";
 29 		regulator-always-on;
 30 		regulator-boot-on;
 31 		regulator-min-microvolt = <3300000>;
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| H A D | imx8mp-dhcom-pdk3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6  * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
 7  * DHCOM PCB number: 660-100 or newer
 8  * PDK3 PCB number: 669-100 or newer
 11 /dts-v1/;
 13 #include <dt-bindings/leds/common.h>
 14 #include <dt-bindings/phy/phy-imx8-pcie.h>
 15 #include "imx8mp-dhcom-som.dtsi"
 19 	compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som",
 23 		stdout-path = &uart1;
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| H A D | imx8mp-data-modul-edm-sbc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;
 8 #include <dt-bindings/net/qca-ar803x.h>
 9 #include <dt-bindings/phy/phy-imx8-pcie.h>
 14 	compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
 22 		stdout-path = &uart3;
 32 		compatible = "pwm-backlight";
 33 		pinctrl-names = "default";
 34 		pinctrl-0 = <&pinctrl_panel_backlight>;
 35 		brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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| H A D | imx8mp-phycore-fpsc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)6 #include <dt-bindings/net/ti-dp83867.h>
 10 	compatible = "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
 11 	model = "PHYTEC phyCORE-i.MX8MP FPSC";
 23 	reg_usdhc2_vmmc: regulator-usdhc2 {
 24 		 compatible = "regulator-fixed";
 25 		 off-on-delay-us = <12000>;
 26 		 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
 27 		 pinctrl-names = "default";
 28 		 regulator-max-microvolt = <3300000>;
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| H A D | imx8mp-tqma8mpql-mba8mp-ras314.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT3  * Copyright (c) 2023-2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
 4  * D-82229 Seefeld, Germany.
 9 /dts-v1/;
 11 #include <dt-bindings/leds/common.h>
 12 #include <dt-bindings/net/ti-dp83867.h>
 13 #include <dt-bindings/phy/phy-imx8-pcie.h>
 14 #include <dt-bindings/pwm/pwm.h>
 15 #include "imx8mp-tqma8mpql.dtsi"
 18 	model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314";
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| /linux/drivers/misc/ | 
| H A D | xilinx_sdfec.c | 1 // SPDX-License-Identifier: GPL-2.08  * This driver is developed for SDFEC16 (Soft Decision FEC 16nm)
 65 /* Write Only - Interrupt Enable Register */
 67 /* Write Only - Interrupt Disable Register */
 69 /* Read Only - Interrupt Mask Register */
 101 /* Write Only - ECC Interrupt Enable Register */
 103 /* Write Only - ECC Interrupt Disable Register */
 105 /* Read Only - ECC Interrupt Mask Register */
 169  * struct xsdfec_clks - For managing SD-FEC clocks
 171  * @axi_clk: AXI4-Lite memory-mapped clock
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| /linux/ | 
| H A D | CREDITS | 1 	This is at least a partial credits-file of people that have4 	scripts.  The fields are: name (N), email (E), web-address
 6 	snail-mail address (S).
 10 ----------
 51 D: in-kernel DRM Maintainer
 76 E: tim_alpaerts@toyota-motor-europe.com
 80 S: B-2610 Wilrijk-Antwerpen
 85 W: http://www-stu.christs.cam.ac.uk/~aia21/
 106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
 107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
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