xref: /freebsd/sys/contrib/device-tree/Bindings/misc/xlnx,sd-fec.yaml (revision 01950c46b8155250f64374fb72fc11faa44bf099)

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Xilinx SDFEC(16nm) IP

maintainers:
  - Cvetic, Dragan <dragan.cvetic@amd.com>
  - Erim, Salih <salih.erim@amd.com>

description:
  The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
  which provides high-throughput LDPC and Turbo Code implementations.
  The LDPC decode & encode functionality is capable of covering a range of
  customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
  principally covers codes used by LTE. The FEC Engine offers significant
  power and area savings versus implementations done in the FPGA fabric.

properties:
  compatible:
    const: xlnx,sd-fec-1.1

  reg:
    maxItems: 1

  clocks:
    minItems: 2
    maxItems: 8
    additionalItems: true
    items:
      - description: Main processing clock for processing core
      - description: AXI4-Lite memory-mapped slave interface clock
      - description: Control input AXI4-Stream Slave interface clock
      - description: DIN AXI4-Stream Slave interface clock
      - description: Status output AXI4-Stream Master interface clock
      - description: DOUT AXI4-Stream Master interface clock
      - description: DIN_WORDS AXI4-Stream Slave interface clock
      - description: DOUT_WORDS AXI4-Stream Master interface clock

  clock-names:
    allOf:
      - minItems: 2
        maxItems: 8
        additionalItems: true
        items:
          - const: core_clk
          - const: s_axi_aclk
      - items:
          enum:
            - core_clk
            - s_axi_aclk
            - s_axis_ctrl_aclk
            - s_axis_din_aclk
            - m_axis_status_aclk
            - m_axis_dout_aclk
            - s_axis_din_words_aclk
            - m_axis_dout_words_aclk

  interrupts:
    maxItems: 1

  xlnx,sdfec-code:
    description:
      The SD-FEC integrated block supports Low Density Parity Check (LDPC)
      decoding and encoding and Turbo code decoding. The LDPC codes used are
      highly configurable, and the specific code used can be specified on
      a codeword-by-codeword basis. The Turbo code decoding is required by LTE
      standard.
    $ref: /schemas/types.yaml#/definitions/string
    items:
      enum: [ ldpc, turbo ]

  xlnx,sdfec-din-width:
    description:
      Configures the DIN AXI stream where a value of 1
      configures a width of "1x128b", 2 a width of "2x128b" and 4 configures a width
      of "4x128b".
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 1, 2, 4 ]

  xlnx,sdfec-din-words:
    description:
      A value 0 indicates that the DIN_WORDS interface is
      driven with a fixed value and is not present on the device, a value of 1
      configures the DIN_WORDS to be block based, while a value of 2 configures the
      DIN_WORDS input to be supplied for each AXI transaction.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 0, 1, 2 ]

  xlnx,sdfec-dout-width:
    description:
      Configures the DOUT AXI stream where a value of 1 configures a width of "1x128b",
      2 a width of "2x128b" and 4 configures a width of "4x128b".
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 1, 2, 4 ]

  xlnx,sdfec-dout-words:
    description:
      A value 0 indicates that the DOUT_WORDS interface is
      driven with a fixed value and is not present on the device, a value of 1
      configures the DOUT_WORDS to be block based, while a value of 2 configures the
      DOUT_WORDS input to be supplied for each AXI transaction.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 0, 1, 2 ]

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - xlnx,sdfec-code
  - xlnx,sdfec-din-width
  - xlnx,sdfec-din-words
  - xlnx,sdfec-dout-width
  - xlnx,sdfec-dout-words

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>

    sd-fec@a0040000 {
        compatible = "xlnx,sd-fec-1.1";
        reg = <0xa0040000 0x40000>;
        clocks = <&misc_clk_2>, <&misc_clk_0>, <&misc_clk_1>, <&misc_clk_1>,
                 <&misc_clk_1>, <&misc_clk_1>;
        clock-names = "core_clk", "s_axi_aclk", "s_axis_ctrl_aclk",
                      "s_axis_din_aclk", "m_axis_status_aclk",
                      "m_axis_dout_aclk";
        interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
        xlnx,sdfec-code = "ldpc";
        xlnx,sdfec-din-width = <2>;
        xlnx,sdfec-din-words = <0>;
        xlnx,sdfec-dout-width = <1>;
        xlnx,sdfec-dout-words = <0>;
    };