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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
13 reg = <0x40000000 0x10000>;
15 #dma-cells = <2>;
17 #dma-channels = <32>;
18 dma-channels = <32>;
19 #dma-requests = <75>;
20 dma-requests = <75>;
[all …]
H A Dpxa2xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
8 #include "dt-bindings/clock/pxa-clock.h"
12 mux- ## func { \
17 mux- ## func { \
20 low-power-disable; \
23 mux- ## func { \
26 low-power-enable; \
30 #address-cells = <1>;
31 #size-cells = <1>;
[all …]
H A Dpxa25x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include "dt-bindings/clock/pxa-clock.h"
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "marvell,pxa250-core-clocks";
23 #clock-cells = <1>;
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
31 clock-frequency = <3686400>;
32 clock-output-names = "ostimer";
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Drockchip,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml#
13 - Heiko Stuebner <heiko@sntech.de>
18 - const: rockchip,px30-nfc
19 - const: rockchip,rk2928-nfc
20 - const: rockchip,rv1108-nfc
21 - items:
[all …]
H A Damlogic,meson-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: nand-controller.yaml
13 - liang.yang@amlogic.com
18 - amlogic,meson-gxl-nfc
19 - amlogic,meson-axg-nfc
21 reg:
24 reg-names:
[all …]
H A Dmediatek,mtk-nfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
19 reg:
21 - description: Base physical address and size of NFI.
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-lp-sk-nand.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "k3-pinctrl.h"
17 gpmc0_pins_default: gpmc0-pins-default {
18 pinctrl-single,pins = <
44 pinctrl-names = "default";
45 pinctrl-0 = <&gpmc0_pins_default>;
[all …]
H A Dk3-am642-evm-nand.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "k3-pinctrl.h"
15 gpmc0_default_pins: gpmc0-default-pins {
16 bootph-all;
17 pinctrl-single,pins = <
53 gpmc0-hog {
[all …]
/linux/Documentation/devicetree/bindings/input/touchscreen/
H A Dsitronix,st1232.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bastian Hecht <hechtb@gmail.com>
13 - $ref: touchscreen.yaml#
18 - sitronix,st1232
19 - sitronix,st1633
21 reg:
32 - compatible
33 - reg
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmpc5121.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
30 reg = <0>;
[all …]
H A Dmpc5125twr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Reworked by Matteo Facchinetti (engineering@sirius-es.it)
11 #include <dt-bindings/clock/mpc512x-clock.h>
13 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&ipic>;
29 #address-cells = <1>;
30 #size-cells = <0>;
34 reg = <0>;
[all …]
/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "regulator-output"; \
10 vout-supply = <&efuse##n>; \
18 reg = <0x##hexaddr>; \
19 shunt-resistor-micro-ohms = <675>; \
22 regulator-name = __stringify(efuse##num##-reg); \
28 model = "Delta Power AHE-50DC";
[all …]
H A Daspeed-bmc-facebook-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/usb/pd.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/i2c/i2c.h>
14 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
26 reg = <0x80000000 0x80000000>;
[all …]
/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
[all …]
/linux/drivers/video/backlight/
H A Dili922x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/lcd.h>
16 #include <linux/module.h>
17 #include <linux/of.h>
18 #include <linux/slab.h>
19 #include <linux/spi/spi.h>
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-friendlyelec-cm3588-nas.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/rockchip.h>
14 #include <dt-bindings/soc/rockchip,vop2.h>
15 #include <dt-bindings/usb/pd.h>
16 #include "rk3588-friendlyelec-cm3588.dtsi"
20 compatible = "friendlyarm,cm3588-nas", "friendlyarm,cm3588", "rockchip,rk3588";
22 adc_key_recovery: adc-key-recovery {
[all …]
/linux/drivers/edac/
H A Damd64_edac.h5 * Copyright (c) 2009-15 Advanced Micro Devices, Inc.
11 #include <linux/module.h>
12 #include <linux/ctype.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/pci_ids.h>
16 #include <linux/slab.h>
17 #include <linux/mmzone.h>
18 #include <linux/edac.h>
19 #include <linux/bitfield.h>
[all …]
/linux/Documentation/devicetree/bindings/hwmon/pmbus/
H A Dinfineon,tda38640.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Naresh Solanki <naresh.solanki@9elements.com>
14 The Infineon TDA38640 is a 40A Single-voltage Synchronous Buck
17 …Datasheet: https://www.infineon.com/dgdl/Infineon-TDA38640-0000-DataSheet-v02_04-EN.pdf?fileId=8ac…
22 - infineon,tda38640
24 reg:
27 infineon,en-pin-fixed-level:
30 unconnected(has internal pull-down).
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3_can.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
35 compatible = "atmel,at91sam9x5-can";
36 reg = <0xf000c000 0x300>;
37 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_can0_rx_tx>;
40 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
[all …]
/linux/drivers/staging/rtl8723bs/os_dep/
H A Dwifi_regd.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2009-2010 Realtek Corporation.
8 #include <drv_types.h>
10 #include <rtw_wifi_regd.h>
21 /* 2G chan 01 - chan 11 */
23 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
30 /* 2G chan 12 - chan 13, PASSIV SCAN */
32 REG_RULE(2467 - 10, 2472 + 10, 40, 0, 20, \
47 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; in _rtw_reg_apply_flags()
48 struct rt_channel_info *channel_set = pmlmeext->channel_set; in _rtw_reg_apply_flags()
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dsnps,dw-umctl2-ddrc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Michal Simek <michal.simek@amd.com>
17 16-bits or 32-bits or 64-bits wide.
19 For instance the ZynqMP DDR controller is based on the DW uMCTL2 v2.40a
20 controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-zynq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/io.h>
10 #include <linux/mfd/syscon.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/of.h>
14 #include <linux/platform_device.h>
15 #include <linux/pinctrl/pinctrl.h>
16 #include <linux/pinctrl/pinmux.h>
17 #include <linux/pinctrl/pinconf.h>
[all …]
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_output_7a2000.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <linux/delay.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_debugfs.h>
10 #include <drm/drm_edid.h>
11 #include <drm/drm_probe_helper.h>
13 #include "lsdc_drv.h"
14 #include "lsdc_output.h"
18 * Display pipe 0 is attached with a built-in transparent VGA encoder and
19 * a built-in HDMI encoder.
[all …]
/linux/arch/m68k/math-emu/
H A Dmulti_arith.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* multi_arith.h: multi-precision integer arithmetic functions, needed
3 to do extended-precision floating point.
5 (c) 1998 David Huggins-Daines.
7 Somewhat based on arch/alpha/math-emu/ieee-math.c, which is (c)
8 David Mosberger-Tang.
14 These are not general multi-precision math routines. Rather, they
16 multiply, divide, and normalize 128-bit unsigned mantissae. */
21 #include "fp_emu.h"
23 static inline void fp_denormalize(struct fp_ext *reg, unsigned int cnt) in fp_denormalize() argument
[all …]

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