| /linux/drivers/clk/qcom/ |
| H A D | clk-regmap.c | 24 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_is_enabled_regmap() local
28 ret = regmap_read(rclk->regmap, rclk->enable_reg, &val); in clk_is_enabled_regmap()
32 if (rclk->enable_is_inverted) in clk_is_enabled_regmap()
33 return (val & rclk->enable_mask) == 0; in clk_is_enabled_regmap()
35 return (val & rclk->enable_mask) != 0; in clk_is_enabled_regmap()
50 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_enable_regmap() local
53 if (rclk->enable_is_inverted) in clk_enable_regmap()
56 val = rclk->enable_mask; in clk_enable_regmap()
58 return regmap_update_bits(rclk->regmap, rclk->enable_reg, in clk_enable_regmap()
59 rclk->enable_mask, val); in clk_enable_regmap()
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| H A D | clk-regmap.h | 36 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
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| /linux/sound/soc/samsung/ |
| H A D | arndale.c | 27 unsigned long rclk; in arndale_rt5631_hw_params() local
31 rclk = params_rate(params) * rfs; in arndale_rt5631_hw_params()
44 ret = snd_soc_dai_set_sysclk(codec_dai, 0, rclk, SND_SOC_CLOCK_OUT); in arndale_rt5631_hw_params()
60 unsigned int rfs, rclk; in arndale_wm1811_hw_params() local
70 rclk = params_rate(params) * rfs; in arndale_wm1811_hw_params()
80 rclk + 1, SND_SOC_CLOCK_IN); in arndale_wm1811_hw_params()
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| H A D | snow.c | 35 unsigned long int rclk; in snow_card_hw_params() local
75 rclk = params_rate(params) * rfs; in snow_card_hw_params()
79 if ((pll_rate[i] - rclk * psr) <= 2) { in snow_card_hw_params()
86 dev_err(rtd->card->dev, "Unsupported RCLK rate: %lu\n", rclk); in snow_card_hw_params()
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,sdx75-gcc.yaml | 27 - description: EMAC0 sgmiiphy mac rclk source
29 - description: EMAC0 sgmiiphy rclk source
31 - description: EMAC1 sgmiiphy mac rclk source
33 - description: EMAC1 sgmiiphy rclk source
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| H A D | baikal,bt1-ccu-pll.yaml | 64 Rclk-+->+---+ | |
70 where Rclk is the reference clock coming from XTAL, NR - reference clock
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_dpll.c | 32 [ICE_DPLL_PIN_TYPE_RCLK_INPUT] = "rclk-input",
386 * dpll, for rclk pins states are separated for each parent.
456 for (parent = 0; parent < pf->dplls.rclk.num_parents; in ice_dpll_pin_state_update()
1318 * ice_dpll_rclk_state_on_pin_set - set a state on rclk pin
1326 * Dpll subsystem callback, set a state of a rclk pin on a parent pin
1376 * ice_dpll_rclk_state_on_pin_get - get a state of rclk pin
1801 * ice_dpll_deinit_rclk_pin - release rclk pin resources
1804 * Deregister rclk pin from parent pins and release resources in dpll subsystem.
1808 struct ice_dpll_pin *rclk = &pf->dplls.rclk; in ice_dpll_deinit_rclk_pin() local
1813 for (i = 0; i < rclk->num_parents; i++) { in ice_dpll_deinit_rclk_pin()
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| H A D | ice_dpll.h | 79 * @rclk: recovered pins pointer
96 struct ice_dpll_pin rclk; member
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| /linux/drivers/slimbus/ |
| H A D | qcom-ctrl.c | 116 struct clk *rclk; member
283 clk_prepare_enable(ctrl->rclk); in qcom_clk_pause_wakeup()
502 ctrl->rclk = devm_clk_get(&pdev->dev, "core"); in qcom_slim_probe()
503 if (IS_ERR(ctrl->rclk)) in qcom_slim_probe()
504 return PTR_ERR(ctrl->rclk); in qcom_slim_probe()
506 ret = clk_set_rate(ctrl->rclk, SLIM_ROOT_FREQ); in qcom_slim_probe()
566 ret = clk_prepare_enable(ctrl->rclk); in qcom_slim_probe()
621 clk_disable_unprepare(ctrl->rclk); in qcom_slim_probe()
636 clk_disable_unprepare(ctrl->rclk); in qcom_slim_remove()
658 clk_disable_unprepare(ctrl->rclk); in qcom_slim_runtime_suspend()
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | faraday,ftgmac100.yaml | 36 - description: RMII RCLK gate for AST2500/2600
42 - const: RCLK
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| /linux/arch/arm/boot/dts/aspeed/ |
| H A D | aspeed-bmc-portwell-neptune.dts | 85 clock-names = "MACCLK", "RCLK";
94 clock-names = "MACCLK", "RCLK";
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| H A D | aspeed-bmc-facebook-yamp.dts | 42 clock-names = "MACCLK", "RCLK";
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| H A D | aspeed-bmc-supermicro-x11spi.dts | 79 clock-names = "MACCLK", "RCLK";
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| H A D | aspeed-bmc-intel-s2600wf.dts | 74 clock-names = "MACCLK", "RCLK";
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| H A D | aspeed-bmc-inspur-on5263m5.dts | 82 clock-names = "MACCLK", "RCLK";
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| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | fsl,qe-tsa.yaml | 76 - const: rclk
195 clock-names = "rsync", "rclk";
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| /linux/include/dt-bindings/sound/ |
| H A D | samsung-i2s.h | 11 #define CLK_I2S_RCLK_PSR 2 /* the RCLK prescaler divider clock
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| /linux/drivers/clk/ |
| H A D | clk-ast2600.c | 579 /* MAC1/2 RMII 50MHz RCLK */ in aspeed_g6_clk_probe()
593 /* RMII1 50MHz (RCLK) output enable */ in aspeed_g6_clk_probe()
601 /* RMII2 50MHz (RCLK) output enable */ in aspeed_g6_clk_probe()
609 /* MAC1/2 RMII 50MHz RCLK */ in aspeed_g6_clk_probe()
623 /* RMII3 50MHz (RCLK) output enable */ in aspeed_g6_clk_probe()
631 /* RMII4 50MHz (RCLK) output enable */ in aspeed_g6_clk_probe()
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| H A D | clk-aspeed.c | 467 /* RMII 50MHz RCLK */ in aspeed_clk_probe()
473 /* RMII1 50MHz (RCLK) output enable */ in aspeed_clk_probe()
481 /* RMII2 50MHz (RCLK) output enable */ in aspeed_clk_probe()
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | ipq9574-rdp433.dts | 55 rclk-pins {
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| H A D | ipq9574-rdp418.dts | 56 rclk-pins {
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| H A D | qcs404-evb.dtsi | 262 rclk-pins {
287 rclk-pins {
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| /linux/drivers/clk/renesas/ |
| H A D | rcar-gen3-cpg.c | 39 #define CPG_RCKCR_CKSEL BIT(15) /* RCLK Clock Source Select */
336 #define RCKCR_CKSEL BIT(1) /* Manual RCLK parent selection */
438 /* Select parent clock of RCLK by MD28 */ in rcar_gen3_cpg_clk_register()
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| /linux/drivers/net/ethernet/faraday/ |
| H A D | ftgmac100.c | 103 struct clk *rclk; member
1787 /* RCLK is for RMII, typically used for NCSI. Optional because it's not in ftgmac100_setup_clk()
1791 priv->rclk = devm_clk_get_optional(priv->dev, "RCLK"); in ftgmac100_setup_clk()
1792 rc = clk_prepare_enable(priv->rclk); in ftgmac100_setup_clk()
2018 clk_disable_unprepare(priv->rclk); in ftgmac100_probe()
2048 clk_disable_unprepare(priv->rclk); in ftgmac100_remove()
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | cdns,qspi-nor.yaml | 124 cdns,rclk-en:
|