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/linux/Documentation/devicetree/bindings/spi/
H A Dfsl,spi-fsl-qspi.yaml4 $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml#
16 - fsl,vf610-qspi
17 - fsl,imx6sx-qspi
18 - fsl,imx7d-qspi
19 - fsl,imx6ul-qspi
20 - fsl,ls1021a-qspi
21 - fsl,ls2080a-qspi
22 - spacemit,k1-qspi
24 - const: spacemit,k3-qspi
25 - const: spacemit,k1-qspi
[all …]
H A Drenesas,rspi.yaml7 title: Renesas (Quad) Serial Peripheral Interface (RSPI/QSPI)
31 - renesas,qspi-r8a7742 # RZ/G1H
32 - renesas,qspi-r8a7743 # RZ/G1M
33 - renesas,qspi-r8a7744 # RZ/G1N
34 - renesas,qspi-r8a7745 # RZ/G1E
35 - renesas,qspi-r8a77470 # RZ/G1C
36 - renesas,qspi-r8a7790 # R-Car H2
37 - renesas,qspi-r8a7791 # R-Car M2-W
38 - renesas,qspi-r8a7792 # R-Car V2H
39 - renesas,qspi-r8a7793 # R-Car M2-N
[all …]
H A Dbrcm,spi-bcm-qspi.yaml4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
36 - brcm,spi-bcm7425-qspi
37 - brcm,spi-bcm7429-qspi
38 - brcm,spi-bcm7435-qspi
39 - brcm,spi-bcm7445-qspi
40 - brcm,spi-bcm7216-qspi
41 - brcm,spi-bcm7278-qspi
42 - const: brcm,spi-bcm-qspi
47 - brcm,spi-brcmstb-qspi
49 - brcm,spi-nsp-qspi
[all …]
H A Dti,qspi.yaml4 $id: http://devicetree.org/schemas/spi/ti,qspi.yaml#
7 title: TI QSPI controller
18 - ti,am4372-qspi
19 - ti,dra7xxx-qspi
48 Name of the hwmod associated to the QSPI. This is for legacy
55 Handle to system control region containing QSPI chipselect register
83 compatible = "ti,dra7xxx-qspi";
H A Dspi-zynqmp-qspi.yaml4 $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#
15 - xlnx,versal-qspi-1.0
16 - xlnx,zynqmp-qspi-1.0
55 const: xlnx,zynqmp-qspi-1.0
72 qspi: spi@ff0f0000 {
73 compatible = "xlnx,zynqmp-qspi-1.0";
H A Dxlnx,zynq-qspi.yaml4 $id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
7 title: Xilinx Zynq QSPI controller
10 The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
22 const: xlnx,zynq-qspi-1.0
52 compatible = "xlnx,zynq-qspi-1.0";
H A Dcdns,qspi-nor-peripheral-props.yaml4 $id: http://devicetree.org/schemas/spi/cdns,qspi-nor-peripheral-props.yaml#
7 title: Peripheral-specific properties for the Cadence QSPI controller.
16 # cdns,qspi-nor.yaml
H A Dnvidia,tegra210-quad-peripheral-props.yaml18 QSPI to corresponding slave device.
27 QSPI to corresponding slave device.
/linux/drivers/spi/
H A Dspi-qpic-snand.c31 /* QSPI NAND config reg bits */
171 struct qpic_spi_nand *qspi = ecceng_to_qspi(eng); in nand_to_qcom_snand() local
173 return qspi->snandc; in nand_to_qcom_snand()
215 struct qpic_ecc *qecc = snandc->qspi->ecc; in qcom_spi_ooblayout_ecc()
239 struct qpic_ecc *qecc = snandc->qspi->ecc; in qcom_spi_ooblayout_free()
266 snandc->qspi->num_cw = cwperpage; in qcom_spi_ecc_init_ctx_pipelined()
325 snandc->qspi->oob_buf = kmalloc(mtd->writesize + mtd->oobsize, in qcom_spi_ecc_init_ctx_pipelined()
327 if (!snandc->qspi->oob_buf) { in qcom_spi_ecc_init_ctx_pipelined()
332 memset(snandc->qspi->oob_buf, 0xff, mtd->writesize + mtd->oobsize); in qcom_spi_ecc_init_ctx_pipelined()
335 snandc->qspi->mtd = mtd; in qcom_spi_ecc_init_ctx_pipelined()
[all …]
H A Dspi-cadence-quadspi.c3 // Driver for Cadence QSPI Controller
33 #define CQSPI_NAME "cadence-qspi"
451 "QSPI is still busy after %dms timeout.\n", in cqspi_wait_idle()
480 /* Polling QSPI idle status. */ in cqspi_exec_flash_cmd()
1109 * be internally synchronized by the QSPI module. Provide 5 in cqspi_indirect_write_execute()
1260 /* Recalculate the baudrate divisor based on QSPI specification. */ in cqspi_config_baudrate_div()
1804 if (of_device_is_compatible(pdev->dev.of_node, "starfive,jh7110-qspi")) in cqspi_probe()
1806 if (of_device_is_compatible(pdev->dev.of_node, "renesas,rzn1-qspi")) in cqspi_probe()
1827 /* Obtain QSPI clocks. */ in cqspi_probe()
1834 dev_err(dev, "Cannot claim mandatory QSPI ref clock.\n"); in cqspi_probe()
[all …]
/linux/arch/m68k/include/asm/
H A Dmcfqspi.h3 * Definitions for Freescale Coldfire QSPI module
12 * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver
18 * The QSPI module has 4 hardware chip selects. We don't use them. Instead
20 * platform data for each QSPI master controller. Only the select and
31 * struct mcfqspi_platform_data - platform data for the coldfire qspi driver
32 * @bus_num: board specific identifier for this qspi driver.
33 * @num_chipselects: number of chip selects supported by this qspi driver.
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zed.dts16 spi0 = &qspi;
50 &qspi {
66 label = "qspi-fsbl-uboot";
70 label = "qspi-linux";
74 label = "qspi-device-tree";
78 label = "qspi-rootfs";
82 label = "qspi-bitstream";
H A Dzynq-zc770-xm013.dts18 spi0 = &qspi;
61 &qspi {
76 label = "qspi-fsbl-uboot";
80 label = "qspi-linux";
84 label = "qspi-device-tree";
88 label = "qspi-rootfs";
92 label = "qspi-bitstream";
H A Dzynq-zc770-xm010.dts18 spi0 = &qspi;
62 &qspi {
76 label = "qspi-fsbl-uboot";
80 label = "qspi-linux";
84 label = "qspi-device-tree";
88 label = "qspi-rootfs";
92 label = "qspi-bitstream";
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7-evm-common.dtsi134 &qspi {
153 label = "QSPI.SPL";
157 label = "QSPI.SPL.backup1";
161 label = "QSPI.SPL.backup2";
165 label = "QSPI.SPL.backup3";
169 label = "QSPI.u-boot";
173 label = "QSPI.u-boot-spl-os";
177 label = "QSPI.u-boot-env";
181 label = "QSPI.u-boot-env.backup1";
185 label = "QSPI.kernel";
[all …]
H A Ddra72-evm-common.dtsi473 &qspi {
492 label = "QSPI.SPL";
496 label = "QSPI.SPL.backup1";
500 label = "QSPI.SPL.backup2";
504 label = "QSPI.SPL.backup3";
508 label = "QSPI.u-boot";
512 label = "QSPI.u-boot-spl-os";
516 label = "QSPI.u-boot-env";
520 label = "QSPI.u-boot-env.backup1";
524 label = "QSPI.kernel";
[all …]
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10_socdk_qspi.dts9 &qspi {
26 partition@qspi-boot {
31 partition@qspi-rootfs {
H A Dsocfpga_arria5_socdk.dts116 &qspi {
133 partition@qspi-boot {
139 partition@qspi-rootfs {
/linux/drivers/pinctrl/
H A Dpinctrl-th1520.c119 [TH1520_MUX_QSPI] = "qspi",
215 TH1520_PAD(0, QSPI1_SCLK, QSPI, ISO, ____, GPIO, FUSE, ____, 0),
216 TH1520_PAD(1, QSPI1_CSN0, QSPI, ____, I2C, GPIO, FUSE, ____, 0),
217 TH1520_PAD(2, QSPI1_D0_MOSI, QSPI, ISO, I2C, GPIO, FUSE, ____, 0),
218 TH1520_PAD(3, QSPI1_D1_MISO, QSPI, ISO, ____, GPIO, FUSE, ____, 0),
219 TH1520_PAD(4, QSPI1_D2_WP, QSPI, ISO, UART, GPIO, FUSE, ____, 0),
220 TH1520_PAD(5, QSPI1_D3_HOLD, QSPI, ISO, UART, GPIO, ____, ____, 0),
239 TH1520_PAD(24, GPIO0_24, GPIO, JTAG, QSPI, ____, DPU0, DPU1, 0),
253 TH1520_PAD(38, GPIO1_6, GPIO, QSPI, ____, ____, DPU0, DPU1, 0),
254 TH1520_PAD(39, GPIO1_7, GPIO, QSPI, ____, ____, DPU0, DPU1, 0),
[all …]
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2g-ice.dts228 qspi_pins: qspi-pins {
322 &qspi {
343 label = "QSPI.u-boot";
347 label = "QSPI.u-boot-env";
351 label = "QSPI.skern";
355 label = "QSPI.pmmc-firmware";
359 label = "QSPI.kernel";
363 label = "QSPI.u-boot-spl-os";
367 label = "QSPI.file-system";
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sam9x60ek.dts309 status = "disabled"; /* Conflict with QSPI. */
356 qspi {
357 pinctrl_qspi: qspi {
601 &qspi {
618 label = "qspi: at91bootstrap";
623 label = "qspi: bootloader";
628 label = "qspi: bootloader env redundant";
633 label = "qspi: bootloader env";
638 label = "qspi: device tree";
643 label = "qspi: kernel";
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7743-iwg20m.dtsi44 qspi_pins: qspi {
46 function = "qspi";
66 &qspi {
H A Dr8a7744-iwg20m.dtsi39 qspi_pins: qspi {
41 function = "qspi";
61 &qspi {
H A Dr8a7745-iwg22m.dtsi43 qspi_pins: qspi {
45 function = "qspi";
70 &qspi {
/linux/drivers/iio/dac/
H A Dad3552r-hs.c28 * with exception for ad355x models where setting QSPI pin high allows QSPI
31 * Due to the fact that ad3541/2r do not implement QSPI, for proper device
32 * detection, HDL keeps "QSPI" pin level low at boot (see ad3552r manual, rev B
34 * between SPI, DSPI and QSPI must be set via software, configuring the target
44 * In buffering mode, driver sets best possible mode, D/QSPI and DDR.
121 * only DSPI interface, while ad355x is QSPI. Then using 2 as in ad3552r_hs_read_raw()
193 * Best access for secondary reg area, QSPI where possible, in ad3552r_hs_set_target_io_mode_hs()
241 * With ad3541/2r support, QSPI pin is held low at reset from HDL, in ad3552r_hs_buffer_postenable()
286 /* Set target to best high speed mode (D or QSPI). */ in ad3552r_hs_buffer_postenable()
291 /* Set bus to best high speed mode (D or QSPI). */ in ad3552r_hs_buffer_postenable()

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