1*c24d3405SKousik Sanagavarapu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c24d3405SKousik Sanagavarapu%YAML 1.2 3*c24d3405SKousik Sanagavarapu--- 4*c24d3405SKousik Sanagavarapu$id: http://devicetree.org/schemas/spi/ti,qspi.yaml# 5*c24d3405SKousik Sanagavarapu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c24d3405SKousik Sanagavarapu 7*c24d3405SKousik Sanagavaraputitle: TI QSPI controller 8*c24d3405SKousik Sanagavarapu 9*c24d3405SKousik Sanagavarapumaintainers: 10*c24d3405SKousik Sanagavarapu - Kousik Sanagavarapu <five231003@gmail.com> 11*c24d3405SKousik Sanagavarapu 12*c24d3405SKousik SanagavarapuallOf: 13*c24d3405SKousik Sanagavarapu - $ref: spi-controller.yaml# 14*c24d3405SKousik Sanagavarapu 15*c24d3405SKousik Sanagavarapuproperties: 16*c24d3405SKousik Sanagavarapu compatible: 17*c24d3405SKousik Sanagavarapu enum: 18*c24d3405SKousik Sanagavarapu - ti,am4372-qspi 19*c24d3405SKousik Sanagavarapu - ti,dra7xxx-qspi 20*c24d3405SKousik Sanagavarapu 21*c24d3405SKousik Sanagavarapu reg: 22*c24d3405SKousik Sanagavarapu items: 23*c24d3405SKousik Sanagavarapu - description: base registers 24*c24d3405SKousik Sanagavarapu - description: mapped memory 25*c24d3405SKousik Sanagavarapu 26*c24d3405SKousik Sanagavarapu reg-names: 27*c24d3405SKousik Sanagavarapu items: 28*c24d3405SKousik Sanagavarapu - const: qspi_base 29*c24d3405SKousik Sanagavarapu - const: qspi_mmap 30*c24d3405SKousik Sanagavarapu 31*c24d3405SKousik Sanagavarapu clocks: 32*c24d3405SKousik Sanagavarapu maxItems: 1 33*c24d3405SKousik Sanagavarapu 34*c24d3405SKousik Sanagavarapu clock-names: 35*c24d3405SKousik Sanagavarapu items: 36*c24d3405SKousik Sanagavarapu - const: fck 37*c24d3405SKousik Sanagavarapu 38*c24d3405SKousik Sanagavarapu interrupts: 39*c24d3405SKousik Sanagavarapu maxItems: 1 40*c24d3405SKousik Sanagavarapu 41*c24d3405SKousik Sanagavarapu num-cs: 42*c24d3405SKousik Sanagavarapu minimum: 1 43*c24d3405SKousik Sanagavarapu maximum: 4 44*c24d3405SKousik Sanagavarapu default: 1 45*c24d3405SKousik Sanagavarapu 46*c24d3405SKousik Sanagavarapu ti,hwmods: 47*c24d3405SKousik Sanagavarapu description: 48*c24d3405SKousik Sanagavarapu Name of the hwmod associated to the QSPI. This is for legacy 49*c24d3405SKousik Sanagavarapu platforms only. 50*c24d3405SKousik Sanagavarapu $ref: /schemas/types.yaml#/definitions/string 51*c24d3405SKousik Sanagavarapu deprecated: true 52*c24d3405SKousik Sanagavarapu 53*c24d3405SKousik Sanagavarapu syscon-chipselects: 54*c24d3405SKousik Sanagavarapu description: 55*c24d3405SKousik Sanagavarapu Handle to system control region containing QSPI chipselect register 56*c24d3405SKousik Sanagavarapu and offset of that register. 57*c24d3405SKousik Sanagavarapu $ref: /schemas/types.yaml#/definitions/phandle-array 58*c24d3405SKousik Sanagavarapu items: 59*c24d3405SKousik Sanagavarapu - items: 60*c24d3405SKousik Sanagavarapu - description: phandle to system control register 61*c24d3405SKousik Sanagavarapu - description: register offset 62*c24d3405SKousik Sanagavarapu 63*c24d3405SKousik Sanagavarapu spi-max-frequency: 64*c24d3405SKousik Sanagavarapu description: Maximum SPI clocking speed of the controller in Hz. 65*c24d3405SKousik Sanagavarapu $ref: /schemas/types.yaml#/definitions/uint32 66*c24d3405SKousik Sanagavarapu 67*c24d3405SKousik Sanagavarapurequired: 68*c24d3405SKousik Sanagavarapu - compatible 69*c24d3405SKousik Sanagavarapu - reg 70*c24d3405SKousik Sanagavarapu - reg-names 71*c24d3405SKousik Sanagavarapu - clocks 72*c24d3405SKousik Sanagavarapu - clock-names 73*c24d3405SKousik Sanagavarapu - interrupts 74*c24d3405SKousik Sanagavarapu 75*c24d3405SKousik SanagavarapuunevaluatedProperties: false 76*c24d3405SKousik Sanagavarapu 77*c24d3405SKousik Sanagavarapuexamples: 78*c24d3405SKousik Sanagavarapu - | 79*c24d3405SKousik Sanagavarapu #include <dt-bindings/clock/dra7.h> 80*c24d3405SKousik Sanagavarapu #include <dt-bindings/interrupt-controller/arm-gic.h> 81*c24d3405SKousik Sanagavarapu 82*c24d3405SKousik Sanagavarapu spi@4b300000 { 83*c24d3405SKousik Sanagavarapu compatible = "ti,dra7xxx-qspi"; 84*c24d3405SKousik Sanagavarapu reg = <0x4b300000 0x100>, 85*c24d3405SKousik Sanagavarapu <0x5c000000 0x4000000>; 86*c24d3405SKousik Sanagavarapu reg-names = "qspi_base", "qspi_mmap"; 87*c24d3405SKousik Sanagavarapu syscon-chipselects = <&scm_conf 0x558>; 88*c24d3405SKousik Sanagavarapu #address-cells = <1>; 89*c24d3405SKousik Sanagavarapu #size-cells = <0>; 90*c24d3405SKousik Sanagavarapu clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>; 91*c24d3405SKousik Sanagavarapu clock-names = "fck"; 92*c24d3405SKousik Sanagavarapu num-cs = <4>; 93*c24d3405SKousik Sanagavarapu spi-max-frequency = <48000000>; 94*c24d3405SKousik Sanagavarapu interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; 95*c24d3405SKousik Sanagavarapu }; 96*c24d3405SKousik Sanagavarapu... 97