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/linux/drivers/crypto/hisilicon/
H A Dqm.c383 struct hisi_qm *qm; member
399 int (*get_vft)(struct hisi_qm *qm, u32 *base, u32 *number);
400 void (*qm_db)(struct hisi_qm *qm, u16 qn,
402 int (*debug_init)(struct hisi_qm *qm);
403 void (*hw_error_init)(struct hisi_qm *qm);
404 void (*hw_error_uninit)(struct hisi_qm *qm);
405 enum acc_err_result (*hw_error_handle)(struct hisi_qm *qm);
406 int (*set_msi)(struct hisi_qm *qm, bool set);
409 int (*set_ifc_begin)(struct hisi_qm *qm, enum qm_ifc_cmd cmd, u32 data, u32 fun_num);
410 void (*set_ifc_end)(struct hisi_qm *qm);
[all …]
H A Dqm_common.h75 int qm_set_and_get_xqc(struct hisi_qm *qm, u8 cmd, void *xqc, u32 qp_id, bool op);
76 void hisi_qm_show_last_dfx_regs(struct hisi_qm *qm);
77 void hisi_qm_set_algqos_init(struct hisi_qm *qm);
H A DMakefile6 hisi_qm-objs = qm.o sgl.o debugfs.o
/linux/include/linux/
H A Dhisi_acc_qm.h16 /* qm user domain */
73 /* qm cache */
270 int (*hw_init)(struct hisi_qm *qm);
271 void (*hw_err_enable)(struct hisi_qm *qm);
272 void (*hw_err_disable)(struct hisi_qm *qm);
273 u32 (*get_dev_hw_err_status)(struct hisi_qm *qm);
274 void (*clear_dev_hw_err_status)(struct hisi_qm *qm, u32 err_sts);
275 void (*open_axi_master_ooo)(struct hisi_qm *qm);
276 void (*close_axi_master_ooo)(struct hisi_qm *qm);
277 void (*open_sva_prefetch)(struct hisi_qm *qm);
[all …]
/linux/drivers/vfio/pci/hisilicon/
H A Dhisi_acc_vfio_pci.c20 static int qm_wait_dev_not_ready(struct hisi_qm *qm) in qm_wait_dev_not_ready() argument
24 return readl_relaxed_poll_timeout(qm->io_base + QM_VF_STATE, in qm_wait_dev_not_ready()
33 static u32 qm_check_reg_state(struct hisi_qm *qm, u32 regs) in qm_check_reg_state() argument
38 state = readl(qm->io_base + regs); in qm_check_reg_state()
41 state = readl(qm->io_base + regs); in qm_check_reg_state()
48 static int qm_read_regs(struct hisi_qm *qm, u32 reg_addr, in qm_read_regs() argument
57 data[i] = readl(qm->io_base + reg_addr); in qm_read_regs()
64 static int qm_write_regs(struct hisi_qm *qm, u32 reg, in qm_write_regs() argument
73 writel(data[i], qm->io_base + reg + i * QM_REG_ADDR_OFFSET); in qm_write_regs()
78 static int qm_get_vft(struct hisi_qm *qm, u32 *base) in qm_get_vft() argument
[all …]
H A Dhisi_acc_vfio_pci.h82 /* QM match information */
89 /* QM reserved match information */
94 /* QM RW regs */
108 /* QM reserved 5 regs */
111 /* QM memory init information */
/linux/drivers/crypto/hisilicon/hpre/
H A Dhpre_crypto.c222 pci_err(qp->qm->pdev, "Can not start qp!\n"); in hpre_get_qp_and_start()
382 ctx->dev = &qp->qm->pdev->dev; in hpre_ctx_set()
384 hpre = container_of(ctx->qp->qm, struct hpre, qm); in hpre_ctx_set()
1748 static int hpre_register_rsa(struct hisi_qm *qm) in hpre_register_rsa() argument
1752 if (!hpre_check_alg_support(qm, HPRE_DRV_RSA_MASK_CAP)) in hpre_register_rsa()
1758 dev_err(&qm->pdev->dev, "failed to register rsa (%d)!\n", ret); in hpre_register_rsa()
1763 static void hpre_unregister_rsa(struct hisi_qm *qm) in hpre_unregister_rsa() argument
1765 if (!hpre_check_alg_support(qm, HPRE_DRV_RSA_MASK_CAP)) in hpre_unregister_rsa()
1771 static int hpre_register_dh(struct hisi_qm *qm) in hpre_register_dh() argument
1775 if (!hpre_check_alg_support(qm, HPRE_DRV_DH_MASK_CAP)) in hpre_register_dh()
[all …]
/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_self_test.c871 "QM: Queue is not empty",
877 "QM: VOQ_0, VOQ credit is not equal to initial credit",
883 "QM: VOQ_1, VOQ credit is not equal to initial credit",
889 "QM: VOQ_4, VOQ credit is not equal to initial credit",
895 "QM: P0 Byte credit is not equal to initial credit",
901 "QM: P1 Byte credit is not equal to initial credit",
1165 "QM: Interrupt status is not 0",
1201 "QM: Credit error register is not 0 (byte or credit overflow/underflow)",
1861 "QM: XQM wrc_fifolvl is not 0",
1867 "QM: UQM wrc_fifolvl is not 0",
[all …]
H A Dbnx2x_init.h178 /* QM queue numbers */
193 /* QM Register addresses */
201 /* extracts the QM queue number for the specified port and vnic */
261 /* Configures the QM according to the specified per-traffic-type COSes */
308 /* number of bytes in single QM arbitration cycle -
597 BLOCK_PRTY_INFO(QM, 0, 0x1ff, 0xfff, 0xfff, 0xfff),
H A Dbnx2x_reg.h181 /* [RW 1] CM - QM Interface enable. If 0 - the acknowledge input is
185 /* [RW 1] If set the Q index; received from the QM is inserted to event ID.
235 /* [RW 28] The CM header value for QM request (primary). */
237 /* [RW 28] The CM header value for QM request (secondary). */
239 /* [RW 1] QM - CM Interface enable. If 0 - the valid input is disregarded;
243 /* [RW 6] QM output initial credit. Max credit available - 32. Write writes
247 /* [RW 3] The weight of the QM (primary) input in the WRR mechanism. 0
251 /* [RW 3] The weight of the QM (secondary) input in the WRR mechanism. 0
266 /* [RW 28] The CM header for QM formatting in case of an error in the QM
1063 follows: [0] PBClient Parity error; [1] PBClient Hw interrupt; [2] QM
[all …]
/linux/lib/raid6/
H A Drecov_rvv.c40 * v14:p/qm[vx], v15:p/qm[vy] in __raid6_2data_recov_rvv()
54 "vrgather.vv v14, v6, v4\n" /* v14 = qm[vx] */ in __raid6_2data_recov_rvv()
55 "vrgather.vv v15, v7, v5\n" /* v15 = qm[vy] */ in __raid6_2data_recov_rvv()
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed_debugfs.c208 DUMP_STR("WED Route QM"), in wed_rxinfo_show()
245 DUMP_STR("WED Route QM"), in wed_rxinfo_show()
502 DUMP_STR("WED Route QM IGRS0(N2H + Recycle)"), in wed_rtqm_show()
511 DUMP_STR("WED Route QM IGRS1(Legacy)"), in wed_rtqm_show()
520 DUMP_STR("WED Route QM IGRS2(RRO3.0)"), in wed_rtqm_show()
529 DUMP_STR("WED Route QM IGRS3(DEBUG)"), in wed_rtqm_show()
/linux/Documentation/hwmon/
H A Dcoretemp.rst71 i7 3920XM, 3820QM, 3720QM, 3667U, 3520M 105
154 i7 840QM/820/740/720 100
/linux/fs/xfs/
H A Dxfs_stats.c60 { "qm", xfsstats_offset(xs_xstrat_bytes)}, in xfs_stats_format()
134 seq_puts(m, "qm"); in xqmstat_proc_show()
/linux/drivers/media/platform/nxp/imx-jpeg/
H A DKconfig11 This is a video4linux2 driver for the i.MX8 QXP/QM integrated
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_dev.c1394 /******************** QM initialization *******************/
1440 /* Getters for resource amounts necessary for qm initialization */
1511 /* initialize the top level QM params */
1540 /* initialize qm vport params */
1551 /* initialize qm port params */
1554 /* Initialize qm port parameters */ in qed_init_qm_port_params()
1576 /* Reset the params which must be reset for qm init. QM init may be called as
1579 * values. The allocations made for QM init, ports, vports, pqs and vfqs are not
1660 /* qm params accounting */ in qed_init_qm_pq()
1722 /* save pq index in qm info */
[all …]
H A Dqed_cxt.h149 * qed_qm_init_pf(): Initailze the QM PF phase, per path.
161 * qed_qm_reconf(): Reconfigures QM pf on the fly.
/linux/drivers/soc/fsl/qbman/
H A Dqman.c1375 static void qman_destroy_portal(struct qman_portal *qm) in qman_destroy_portal() argument
1380 qm_dqrr_sdqcr_set(&qm->p, 0); in qman_destroy_portal()
1391 qm_eqcr_cce_update(&qm->p); in qman_destroy_portal()
1392 qm_eqcr_cce_update(&qm->p); in qman_destroy_portal()
1393 pcfg = qm->config; in qman_destroy_portal()
1395 free_irq(pcfg->irq, qm); in qman_destroy_portal()
1397 kfree(qm->cgrs); in qman_destroy_portal()
1398 qm_mc_finish(&qm->p); in qman_destroy_portal()
1399 qm_mr_finish(&qm->p); in qman_destroy_portal()
1400 qm_dqrr_finish(&qm->p); in qman_destroy_portal()
[all …]
/linux/drivers/firmware/imx/
H A DKconfig21 (QM, QP), and i.MX8QX (QXP, DX).
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-qmss.txt21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
44 For QMSS on K2G SoC, following QM reg indexes are used in that order
/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2_security.c2645 /* Unsecure all TPC QM tensors */ in gaudi2_init_pb_tpc()
2653 /* unsecure all 32 TPC QM SRF regs */ in gaudi2_init_pb_tpc()
3331 /* MME QM */ in gaudi2_init_protection_bits()
3348 /* MME QM ARC ACP ENG */ in gaudi2_init_protection_bits()
3499 /* NIC QM and QPC */ in gaudi2_init_protection_bits()
3507 /* NIC QM ARC */ in gaudi2_init_protection_bits()
3696 /* MME QM */ in gaudi2_ack_protection_bits_errors()
3709 /* MME QM ARC ACP ENG */ in gaudi2_ack_protection_bits_errors()
3805 /* NIC QM and QPC */ in gaudi2_ack_protection_bits_errors()
3810 /* NIC QM ARC */ in gaudi2_ack_protection_bits_errors()
H A Dgaudi2_masks.h66 /* QM_IDLE_MASK is valid for all engines QM idle check */
/linux/include/linux/qed/
H A Dcommon_hsi.h132 /* Traffic classes in network-facing blocks (PBF, BTB, NIG, BRB, PRS and QM) */
352 /* QM CONSTANTS */
355 /* Number of TX queues in the QM */
360 /* Number of Other queues in the QM */
380 /* QM registers data */
/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2g-netcp.dtsi9 compatible = "ti,66ak2g-navss-qm";
/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml16 (QM, QP), and i.MX8QX (QXP, DX).

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