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/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-npcm730-gsj-gpio.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0pp_pins: gpio0pp-pins {
8 bias-disable;
9 drive-push-pull;
11 gpio1pp_pins: gpio1pp-pins {
13 bias-disable;
14 drive-push-pull;
16 gpio2pp_pins: gpio2pp-pins {
18 bias-disable;
19 drive-push-pull;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp13-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
16 i2c1_pins_a: i2c1-0 {
20 bias-disable;
21 drive-open-drain;
22 slew-rate = <0>;
26 i2c1_sleep_pins_a: i2c1-sleep-0 {
33 i2c5_pins_a: i2c5-0 {
[all …]
H A Dstm32mp15-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-n
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H A Dstm32h7-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
[all …]
H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rc
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H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
56 gpio-controller;
57 #gpio-cells = <2>;
58 interrupt-controller;
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H A Dstm32mp151a-prtt1l.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxad-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-binding
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-binding
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/freebsd/sys/dev/qat/qat_hw/qat_dh895xcc/
H A Dadf_dh895xcc_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
38 /* BIT(2) enables the logging of push/pull data errors. */
67 * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
68 * BIT(0) enables error detection and reporting on the RI CPP Push interface.
75 * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
76 * BIT(0) enables error detection and reporting on the TI CPP Push interface.
84 * BIT(0) enables detecting and logging of push/pull data errors.
103 * BIT(3) enables detecting and logging push/pull data errors.
109 /* Enabling PKE4-PKE0. */
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dsja1000.txt5 - compatible : should be one of "nxp,sja1000", "technologic,sja1000".
7 - reg : should specify the chip select, address offset and size required
10 - interrupts: property with a value describing the interrupt source
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
20 - nxp,external-clock-frequency : Frequency of the external oscillator
25 - nxp,tx-output-mode : operation mode of the TX output control logic:
26 <0x0> : bi-phase output mode
31 - nxp,tx-output-config : TX output pin configuration:
33 <0x02> : TX0 pull-down (default)
34 <0x04> : TX0 pull-up
[all …]
H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/
H A Daspeed-wdt.txt4 - compatible: must be one of:
5 - "aspeed,ast2400-wdt"
6 - "aspeed,ast2500-wdt"
7 - "aspeed,ast2600-wdt"
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-typ
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dsmsc911x.txt1 * Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
4 - compatible : Should be "smsc,lan<model>", "smsc,lan9115"
5 - reg : Address and length of the io space for SMSC LAN
6 - interrupts : one or two interrupt specifiers
7 - The first interrupt is the SMSC LAN interrupt line
8 - The second interrupt (if present) is the PME (power
11 - phy-mode : See ethernet.txt file in the same directory
14 - reg-shift : Specify the quantity to shift the register offsets by
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
18 - smsc,irq-active-high : Indicates the IRQ polarity is active-high
[all …]
H A Dsmsc,lan9115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: ethernet-controller.yaml#
18 - const: smsc,lan9115
19 - items:
20 - enum:
21 - smsc,lan89218
[all …]
/freebsd/sys/dev/qat/qat_hw/qat_c62x/
H A Dadf_c62x_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
36 /* BIT(2) enables the logging of push/pull data errors. */
63 * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
64 * BIT(0) enables error detection and reporting on the RI CPP Push interface.
74 * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
75 * BIT(0) enables error detection and reporting on the TI CPP Push interface.
83 * BIT(0) enables detecting and logging of push/pull data errors.
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dst,stmfx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectonics Multi-Function eXpander (STMFX)
9 description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
15 - Amelie Delaunay <amelie.delaunay@foss.st.com>
19 const: st,stmfx-0300
27 drive-open-drain: true
29 vdd-supply: true
36 const: st,stmfx-0300-pinctrl
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/freebsd/contrib/ntp/
H A DREADME.pullrequests3 The NTP project's github repository is at https://github.com/ntp-project/ntp.
8 ntp-stable code (even 2nd number).
10 The master branch is for new development, also known as ntp-dev (which
15 on the stable branch, and pull your work into a master copy to allow for
16 publishing your changes in the ntp-dev or master branch.
19 current stable release (the ntp-stable code) then it's better to do your
22 Make sure that any changes you make to stable pull cleanly into master.
27 If you follow this method, then if you submit a pull request for either
32 handled sooner if the repo that contains your pull requests also includes
37 1) If you haven't, create a fork of ntp-project/ntp with your github account.
[all …]
/freebsd/sys/dev/qat/qat_hw/qat_200xx/
H A Dadf_200xx_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
38 /* BIT(2) enables the logging of push/pull data errors. */
62 * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
63 * BIT(0) enables error detection and reporting on the RI CPP Push interface.
72 * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
73 * BIT(0) enables error detection and reporting on the TI CPP Push interface.
81 * BIT(0) enables detecting and logging of push/pull data errors.
86 /* Enabling PKE4-PKE0. */
/freebsd/sys/dev/qat/qat_hw/qat_c3xxx/
H A Dadf_c3xxx_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
36 /* BIT(2) enables the logging of push/pull data errors. */
60 * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
61 * BIT(0) enables error detection and reporting on the RI CPP Push interface.
70 * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
71 * BIT(0) enables error detection and reporting on the TI CPP Push interface.
79 * BIT(0) enables detecting and logging of push/pull data errors.
84 /* Enabling PKE4-PKE0. */
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,pmic-gpio.txt6 - compatible:
10 "qcom,pm8005-gpio"
11 "qcom,pm8018-gpio"
12 "qcom,pm8038-gpio"
13 "qcom,pm8058-gpio"
14 "qcom,pm8916-gpio"
15 "qcom,pm8917-gpio"
16 "qcom,pm8921-gpio"
17 "qcom,pm8941-gpio"
18 "qcom,pm8950-gpio"
[all …]
H A Dpinctrl-stmfx.txt1 STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings
3 ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
7 - compatible: should be "st,stmfx-0300-pinctrl".
8 - #gpio-cells: should be <2>, the first cell is the GPIO number and the second
9 cell is the gpio flags in accordance with <dt-bindings/gpio/gpio.h>.
10 - gpio-controller: marks the device as a GPIO controller.
11 - #interrupt-cells: should be <2>, the first cell is the GPIO number and the
13 <dt-bindings/interrupt-controller/irq.h>.
14 - interrupt-controller: marks the device as an interrupt controller.
15 - gpio-ranges: specifies the mapping between gpio controller and pin
[all …]
/freebsd/usr.sbin/ppp/
H A Dlink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
77 if (l->stats.gather) { in link_AddInOctets()
78 throughput_addin(&l->stats.total, n); in link_AddInOctets()
79 if (l->stats.parent) in link_AddInOctets()
80 throughput_addin(l->stats.parent, n); in link_AddInOctets()
87 if (l->stats.gather) { in link_AddOutOctets()
88 throughput_addout(&l->stats.total, n); in link_AddOutOctets()
89 if (l->stats.parent) in link_AddOutOctets()
90 throughput_addout(l->stats.parent, n); in link_AddOutOctets()
[all …]
/freebsd/crypto/openssl/crypto/bn/asm/
H A Dx86_64-mont.pl2 # Copyright 2005-2020 The OpenSSL Project Authors. All Rights Reserved.
29 # for 512-/1024-/2048-/4096-bit RSA *sign* benchmarks respectively.
33 # Unroll and modulo-schedule inner loops in such manner that they
35 # 1024-bit RSA *sign*. Average performance improvement in comparison
37 # for 512-/1024-/2048-/4096-bit RSA *sign* benchmarks respectively.
41 # Optimize reduction in squaring procedure and improve 1024+-bit RSA
42 # sign performance by 10-16% on Intel Sandy Bridge and later
43 # (virtually same on non-Intel processors).
57 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
58 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
[all …]
/freebsd/contrib/kyua/
H A DCONTRIBUTING.md10 -----------
14 Agreement](https://developers.google.com/open-source/cla/individual),
19 things--for instance that you will tell us if you know that your code
27 Agreement](https://developers.google.com/open-source/cla/corporate).
32 changes to Google Inc. and use the 3-clause BSD license text included
40 -------------
44 [kyua-discuss mailing
45 list](https://groups.google.com/forum/#!forum/kyua-discuss)
50 [kyua-log mailing list](https://groups.google.com/forum/#!forum/kyua-log) to
55 ------------
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/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
355 * BIT(1) enables error detection and reporting on the RI CPP Pull interface.
356 * BIT(0) enables error detection and reporting on the RI CPP Push interface.
369 * BIT(3) enables CPP command and pull data parity checking.
371 * Pull interface.
372 * BIT(1) enables error detection and reporting on the TI CPP Pull interface.
373 * BIT(0) enables error detection and reporting on the TI CPP Push interface.
383 * BIT(0) enables detecting and logging of push/pull data errors.
408 * Bit<2> CPP memory push/pull error enable bit
[all …]

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