1*f126890aSEmmanuel Vadot/* 2*f126890aSEmmanuel Vadot * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 3*f126890aSEmmanuel Vadot * 4*f126890aSEmmanuel Vadot * This file is dual-licensed: you can use it either under the terms 5*f126890aSEmmanuel Vadot * of the GPL or the X11 license, at your option. Note that this dual 6*f126890aSEmmanuel Vadot * licensing only applies to this file, and not this project as a 7*f126890aSEmmanuel Vadot * whole. 8*f126890aSEmmanuel Vadot * 9*f126890aSEmmanuel Vadot * a) This file is free software; you can redistribute it and/or 10*f126890aSEmmanuel Vadot * modify it under the terms of the GNU General Public License as 11*f126890aSEmmanuel Vadot * published by the Free Software Foundation; either version 2 of the 12*f126890aSEmmanuel Vadot * License, or (at your option) any later version. 13*f126890aSEmmanuel Vadot * 14*f126890aSEmmanuel Vadot * This file is distributed in the hope that it will be useful, 15*f126890aSEmmanuel Vadot * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*f126890aSEmmanuel Vadot * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*f126890aSEmmanuel Vadot * GNU General Public License for more details. 18*f126890aSEmmanuel Vadot * 19*f126890aSEmmanuel Vadot * Or, alternatively, 20*f126890aSEmmanuel Vadot * 21*f126890aSEmmanuel Vadot * b) Permission is hereby granted, free of charge, to any person 22*f126890aSEmmanuel Vadot * obtaining a copy of this software and associated documentation 23*f126890aSEmmanuel Vadot * files (the "Software"), to deal in the Software without 24*f126890aSEmmanuel Vadot * restriction, including without limitation the rights to use, 25*f126890aSEmmanuel Vadot * copy, modify, merge, publish, distribute, sublicense, and/or 26*f126890aSEmmanuel Vadot * sell copies of the Software, and to permit persons to whom the 27*f126890aSEmmanuel Vadot * Software is furnished to do so, subject to the following 28*f126890aSEmmanuel Vadot * conditions: 29*f126890aSEmmanuel Vadot * 30*f126890aSEmmanuel Vadot * The above copyright notice and this permission notice shall be 31*f126890aSEmmanuel Vadot * included in all copies or substantial portions of the Software. 32*f126890aSEmmanuel Vadot * 33*f126890aSEmmanuel Vadot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34*f126890aSEmmanuel Vadot * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35*f126890aSEmmanuel Vadot * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36*f126890aSEmmanuel Vadot * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37*f126890aSEmmanuel Vadot * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38*f126890aSEmmanuel Vadot * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39*f126890aSEmmanuel Vadot * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40*f126890aSEmmanuel Vadot * OTHER DEALINGS IN THE SOFTWARE. 41*f126890aSEmmanuel Vadot */ 42*f126890aSEmmanuel Vadot 43*f126890aSEmmanuel Vadot#include <dt-bindings/pinctrl/stm32-pinfunc.h> 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot&pinctrl { 46*f126890aSEmmanuel Vadot 47*f126890aSEmmanuel Vadot i2c1_pins_a: i2c1-0 { 48*f126890aSEmmanuel Vadot pins { 49*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ 50*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ 51*f126890aSEmmanuel Vadot bias-disable; 52*f126890aSEmmanuel Vadot drive-open-drain; 53*f126890aSEmmanuel Vadot slew-rate = <0>; 54*f126890aSEmmanuel Vadot }; 55*f126890aSEmmanuel Vadot }; 56*f126890aSEmmanuel Vadot 57*f126890aSEmmanuel Vadot ethernet_rmii: rmii-0 { 58*f126890aSEmmanuel Vadot pins { 59*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('G', 11, AF11)>, 60*f126890aSEmmanuel Vadot <STM32_PINMUX('G', 13, AF11)>, 61*f126890aSEmmanuel Vadot <STM32_PINMUX('G', 12, AF11)>, 62*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 4, AF11)>, 63*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 5, AF11)>, 64*f126890aSEmmanuel Vadot <STM32_PINMUX('A', 7, AF11)>, 65*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 1, AF11)>, 66*f126890aSEmmanuel Vadot <STM32_PINMUX('A', 2, AF11)>, 67*f126890aSEmmanuel Vadot <STM32_PINMUX('A', 1, AF11)>; 68*f126890aSEmmanuel Vadot slew-rate = <2>; 69*f126890aSEmmanuel Vadot }; 70*f126890aSEmmanuel Vadot }; 71*f126890aSEmmanuel Vadot 72*f126890aSEmmanuel Vadot sdmmc1_b4_pins_a: sdmmc1-b4-0 { 73*f126890aSEmmanuel Vadot pins { 74*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 75*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 76*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 77*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 78*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ 79*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 80*f126890aSEmmanuel Vadot slew-rate = <3>; 81*f126890aSEmmanuel Vadot drive-push-pull; 82*f126890aSEmmanuel Vadot bias-disable; 83*f126890aSEmmanuel Vadot }; 84*f126890aSEmmanuel Vadot }; 85*f126890aSEmmanuel Vadot 86*f126890aSEmmanuel Vadot sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { 87*f126890aSEmmanuel Vadot pins1 { 88*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ 89*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ 90*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ 91*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ 92*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ 93*f126890aSEmmanuel Vadot slew-rate = <3>; 94*f126890aSEmmanuel Vadot drive-push-pull; 95*f126890aSEmmanuel Vadot bias-disable; 96*f126890aSEmmanuel Vadot }; 97*f126890aSEmmanuel Vadot pins2 { 98*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ 99*f126890aSEmmanuel Vadot slew-rate = <3>; 100*f126890aSEmmanuel Vadot drive-open-drain; 101*f126890aSEmmanuel Vadot bias-disable; 102*f126890aSEmmanuel Vadot }; 103*f126890aSEmmanuel Vadot }; 104*f126890aSEmmanuel Vadot 105*f126890aSEmmanuel Vadot sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { 106*f126890aSEmmanuel Vadot pins { 107*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ 108*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ 109*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ 110*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ 111*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ 112*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ 113*f126890aSEmmanuel Vadot }; 114*f126890aSEmmanuel Vadot }; 115*f126890aSEmmanuel Vadot 116*f126890aSEmmanuel Vadot sdmmc1_dir_pins_a: sdmmc1-dir-0 { 117*f126890aSEmmanuel Vadot pins1 { 118*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ 119*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ 120*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */ 121*f126890aSEmmanuel Vadot slew-rate = <3>; 122*f126890aSEmmanuel Vadot drive-push-pull; 123*f126890aSEmmanuel Vadot bias-pull-up; 124*f126890aSEmmanuel Vadot }; 125*f126890aSEmmanuel Vadot pins2 { 126*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */ 127*f126890aSEmmanuel Vadot bias-pull-up; 128*f126890aSEmmanuel Vadot }; 129*f126890aSEmmanuel Vadot }; 130*f126890aSEmmanuel Vadot 131*f126890aSEmmanuel Vadot sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { 132*f126890aSEmmanuel Vadot pins { 133*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */ 134*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ 135*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ 136*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */ 137*f126890aSEmmanuel Vadot }; 138*f126890aSEmmanuel Vadot }; 139*f126890aSEmmanuel Vadot 140*f126890aSEmmanuel Vadot sdmmc2_b4_pins_a: sdmmc2-b4-0 { 141*f126890aSEmmanuel Vadot pins { 142*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */ 143*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ 144*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ 145*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ 146*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */ 147*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ 148*f126890aSEmmanuel Vadot slew-rate = <3>; 149*f126890aSEmmanuel Vadot drive-push-pull; 150*f126890aSEmmanuel Vadot bias-disable; 151*f126890aSEmmanuel Vadot }; 152*f126890aSEmmanuel Vadot }; 153*f126890aSEmmanuel Vadot 154*f126890aSEmmanuel Vadot sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { 155*f126890aSEmmanuel Vadot pins1 { 156*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ 157*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ 158*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ 159*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ 160*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */ 161*f126890aSEmmanuel Vadot slew-rate = <3>; 162*f126890aSEmmanuel Vadot drive-push-pull; 163*f126890aSEmmanuel Vadot bias-disable; 164*f126890aSEmmanuel Vadot }; 165*f126890aSEmmanuel Vadot pins2 { 166*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ 167*f126890aSEmmanuel Vadot slew-rate = <3>; 168*f126890aSEmmanuel Vadot drive-open-drain; 169*f126890aSEmmanuel Vadot bias-disable; 170*f126890aSEmmanuel Vadot }; 171*f126890aSEmmanuel Vadot }; 172*f126890aSEmmanuel Vadot 173*f126890aSEmmanuel Vadot sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { 174*f126890aSEmmanuel Vadot pins { 175*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */ 176*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */ 177*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */ 178*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */ 179*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */ 180*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */ 181*f126890aSEmmanuel Vadot }; 182*f126890aSEmmanuel Vadot }; 183*f126890aSEmmanuel Vadot 184*f126890aSEmmanuel Vadot spi1_pins: spi1-0 { 185*f126890aSEmmanuel Vadot pins1 { 186*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('A', 5, AF5)>, 187*f126890aSEmmanuel Vadot /* SPI1_CLK */ 188*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 5, AF5)>; 189*f126890aSEmmanuel Vadot /* SPI1_MOSI */ 190*f126890aSEmmanuel Vadot bias-disable; 191*f126890aSEmmanuel Vadot drive-push-pull; 192*f126890aSEmmanuel Vadot slew-rate = <2>; 193*f126890aSEmmanuel Vadot }; 194*f126890aSEmmanuel Vadot pins2 { 195*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('G', 9, AF5)>; 196*f126890aSEmmanuel Vadot /* SPI1_MISO */ 197*f126890aSEmmanuel Vadot bias-disable; 198*f126890aSEmmanuel Vadot }; 199*f126890aSEmmanuel Vadot }; 200*f126890aSEmmanuel Vadot 201*f126890aSEmmanuel Vadot uart4_pins: uart4-0 { 202*f126890aSEmmanuel Vadot pins1 { 203*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */ 204*f126890aSEmmanuel Vadot bias-disable; 205*f126890aSEmmanuel Vadot drive-push-pull; 206*f126890aSEmmanuel Vadot slew-rate = <0>; 207*f126890aSEmmanuel Vadot }; 208*f126890aSEmmanuel Vadot pins2 { 209*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */ 210*f126890aSEmmanuel Vadot bias-disable; 211*f126890aSEmmanuel Vadot }; 212*f126890aSEmmanuel Vadot }; 213*f126890aSEmmanuel Vadot 214*f126890aSEmmanuel Vadot usart1_pins: usart1-0 { 215*f126890aSEmmanuel Vadot pins1 { 216*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ 217*f126890aSEmmanuel Vadot bias-disable; 218*f126890aSEmmanuel Vadot drive-push-pull; 219*f126890aSEmmanuel Vadot slew-rate = <0>; 220*f126890aSEmmanuel Vadot }; 221*f126890aSEmmanuel Vadot pins2 { 222*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ 223*f126890aSEmmanuel Vadot bias-disable; 224*f126890aSEmmanuel Vadot }; 225*f126890aSEmmanuel Vadot }; 226*f126890aSEmmanuel Vadot 227*f126890aSEmmanuel Vadot usart2_pins: usart2-0 { 228*f126890aSEmmanuel Vadot pins1 { 229*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ 230*f126890aSEmmanuel Vadot bias-disable; 231*f126890aSEmmanuel Vadot drive-push-pull; 232*f126890aSEmmanuel Vadot slew-rate = <0>; 233*f126890aSEmmanuel Vadot }; 234*f126890aSEmmanuel Vadot pins2 { 235*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ 236*f126890aSEmmanuel Vadot bias-disable; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot }; 239*f126890aSEmmanuel Vadot 240*f126890aSEmmanuel Vadot usart3_pins: usart3-0 { 241*f126890aSEmmanuel Vadot pins1 { 242*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */ 243*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS_DE */ 244*f126890aSEmmanuel Vadot bias-disable; 245*f126890aSEmmanuel Vadot drive-push-pull; 246*f126890aSEmmanuel Vadot slew-rate = <0>; 247*f126890aSEmmanuel Vadot }; 248*f126890aSEmmanuel Vadot pins2 { 249*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */ 250*f126890aSEmmanuel Vadot <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */ 251*f126890aSEmmanuel Vadot bias-disable; 252*f126890aSEmmanuel Vadot }; 253*f126890aSEmmanuel Vadot }; 254*f126890aSEmmanuel Vadot 255*f126890aSEmmanuel Vadot usbotg_hs_pins_a: usbotg-hs-0 { 256*f126890aSEmmanuel Vadot pins { 257*f126890aSEmmanuel Vadot pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ 258*f126890aSEmmanuel Vadot <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */ 259*f126890aSEmmanuel Vadot <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */ 260*f126890aSEmmanuel Vadot <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */ 261*f126890aSEmmanuel Vadot <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */ 262*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */ 263*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */ 264*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */ 265*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */ 266*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */ 267*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */ 268*f126890aSEmmanuel Vadot <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */ 269*f126890aSEmmanuel Vadot bias-disable; 270*f126890aSEmmanuel Vadot drive-push-pull; 271*f126890aSEmmanuel Vadot slew-rate = <2>; 272*f126890aSEmmanuel Vadot }; 273*f126890aSEmmanuel Vadot }; 274*f126890aSEmmanuel Vadot}; 275*f126890aSEmmanuel Vadot 276