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/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath10k.txt4 - compatible: Should be one of the following:
6 * "qcom,ipq4019-wifi"
7 * "qcom,wcn3990-wifi"
9 PCI based devices uses compatible string "qcom,ath10k" and takes calibration
10 data along with board specific data via "qcom,ath10k-calibration-data".
13 AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
15 "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
16 to carry pre calibration data.
18 In general, entry "qcom,ath10k-pre-calibration-data" and
19 "qcom,ath10k-calibration-data" conflict with each other and only one
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H A Dqcom,ath10k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kalle Valo <kvalo@kernel.org>
18 - qcom,ath10k # SDIO-based devices
19 - qcom,ipq4019-wifi
20 - qcom,wcn3990-wifi # SNoC-based devices
25 reg-names:
27 - const: membase
33 interrupt-names:
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/
H A Dqcom,spmi-vadc.txt3 - SPMI PMIC voltage ADC (VADC) provides interface to clients to read
4 voltage. The VADC is a 15-bit sigma-delta ADC.
5 - SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read
6 voltage. The VADC is a 16-bit sigma-delta ADC.
10 - compatible:
13 Definition: Should contain "qcom,spmi-vadc".
14 Should contain "qcom,spmi-adc5" for PMIC5 ADC driver.
15 Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver.
16 Should contain "qcom,pms405-adc" for PMS405 PMIC
18 - reg:
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H A Dqcom,spmi-vadc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - And
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/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dqcom-spmi-adc-tm-hc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-ad
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H A Dqcom-spmi-adc-tm5.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-ad
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H A Dqcom-tsens.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 ---
5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
22 - descriptio
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq4018-ap120c-ac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
8 model = "ALFA Network AP120C-AC";
9 compatible = "alfa-networ
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/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dti,drv260x.txt1 * Texas Instruments - drv260x Haptics driver family
4 - compatible - One of:
5 "ti,drv2604" - DRV2604
6 "ti,drv2605" - DRV2605
7 "ti,drv2605l" - DRV2605L
8 - reg - I2C slave address
9 - vbat-supply - Required supply regulator
10 - mode - Power up mode of the chip (defined in include/dt-bindings/input/ti-drv260x.h)
11 DRV260X_LRA_MODE - Linear Resonance Actuator mode (Piezoelectric)
12 DRV260X_LRA_NO_CAL_MODE - This is a LRA Mode but there is no calibration
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H A Dti,drv260x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments - drv260x Haptics driver family
10 - Andrew Davis <afd@ti.com>
15 - ti,drv2604
16 - ti,drv2605
17 - ti,drv2605l
22 vbat-supply:
30 (defined in include/dt-bindings/input/ti-drv260x.h)
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/freebsd/sys/contrib/dev/athk/ath10k/
H A Dcore.c1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
21 #include <linux/nvmem-consumer.h>
33 #include "wmi-ops.h"
64 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
65 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
473 * or 2x2 160Mhz, long-guard-interval.
523 * 1x1 160Mhz, long-guard-interval.
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/freebsd/contrib/ntp/html/drivers/
H A Ddriver26.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
6 <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
15 <!-- #BeginDate format:En2m -->5-Oct-2005 04:37<!-- #EndDate -->
22 …Serial Port: <tt>/dev/hpgps<i>u</i></tt>; 9600 baud, 8-bits, no parity, 19200 baud 7-bits, odd par…
26 <pre>T#yyyymmddhhmmssMFLRVcc&lt;cr&gt;&lt;lf&gt;scpi &gt;</pre>
28 <pre>scpi &gt;T#yyyymmddhhmmssMFLRVcc&lt;cr&gt;&lt;lf&gt;</pre>
29 …-time character, at 980 msec. before the next 1PPS edge. The # is the timecode format type. We loo…
36 … <dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.
H A Ddriver11.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->11-Sep-2010 05:56<!-- #EndDate -->
20 Serial Port: <tt>/dev/gps<i>u</i></tt>; 9600 baud, 8-bits, no parity<br>
27 <pre>&lt;cr&gt;&lt;lf&gt;i yy ddd hh:mm:ss.000bbb
29 on-time = &lt;cr&gt;
35 bbb = tailing spaces for fill</pre>
38 <p>Format <tt>TQ</tt> (IEEE P1344 estimated worst-case time quality)</p>
39 <pre>0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; clock locked, maximum accuracy
48 B&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; clock unlocked, accuracy &lt; 10 s</pre>
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H A Ddriver3.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->11-Sep-2010 05:56<!-- #EndDate -->
20 Serial Port: <tt>/dev/wwv<i>u</i></tt>; 9600 baud, 8-bits, no parity<br>
24 …-hour day-of-year format and UTC time zone. Automatic correction for DST should be disabled. It is…
26 <pre>
30 on-time = first &lt;cr&gt;
32 a = AM/PM indicator (' ' for 24-hour mode)
35 s = daylight-saving indicator (' ' for 24-hour mode)
48 xx = 94 (unknown)</pre>
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H A Ddriver19.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->11-Sep-2010 05:56<!-- #EndDate -->
20 Serial Port: <tt>/dev/heath<i>u</i></tt>; 1200 baud, 8-bits, no parity<br>
24 <p>This driver supports the Heath GC-1000 Most Accurate Clock, with RS232C Output Accessory. This i…
25 …e and the current year. The external DIPswitches should be set to GMT and 24-hour format. It is ve…
26 …>TIOCM_RTS</tt> control bit. Present restrictions require the use of a POSIX-compatible programmin…
28 <pre>hh:mm:ss.f&nbsp;&nbsp;&nbsp;&nbsp; dd/mm/yr&lt;cr&gt;
32 dd/mm/yr = day, month, year</pre>
38 <dd>Specifies the time offset calibration factor, in seconds and fraction, with default 0.0.</dd>
H A Ddriver20.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
3 …<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"><title>Generic NMEA GPS Rec…
4 <!-- Changed by: Pearly &, 04-Feb-2019 -->
7 table.dlstable { font-size:85%; }
8 td.ttf{ font-family:Courier; font-weight:bold; }
16 <!-- #BeginDate format:En2m -->17-Oct-2020 16:00<!-- #EndDate -->
25 Serial Port: <tt>/dev/gps<i>u</i></tt>; 4800 - 115200 bps, 8-bits, no parity<br>
46 IDs</a> when using non-GPS or multi-system receivers.
114 <td>Day of the month (1-31)</td>
168 <td>Month of the year (1-12)</td>
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H A Ddriver28.html1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
6 <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
11 table.dlstable { font-size:85%; }
12 td.ttf{ font-family:Courier; font-weight:bold; }
19 <!-- #BeginDate format:En2m -->8-Aug-2014 19:17<!-- #EndDate -->
29 memory-segment. The shared memory-segment is created with owner-only
31 &ge;2. Units 0 and 1 are always created with owner-only access for
36 <h4>Structure of shared memory-segment</h4>
37 <pre>struct shmTime {
38 int mode; /* 0 - if valid is set:
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H A Ddriver7.html1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->17-Jul-2014 02:17<!-- #EndDate -->
20 Modem Port: <tt>/dev/chu<i>u</i></tt>; 300 baud, 8-bits, no parity<br>
21 Autotune Port: <tt>/dev/icom</tt>; 1200/9600 baud, 8-bits, no parity<br>
25 …from Canadian time/frequency station <a href="http://inms-ienm.nrc-cnrc.gc.ca/time_services/shortw…
31 …-compatible, 300-b/s modem or modem chip, as described on the <a href="../pps.html">Pulse-per-seco…
32 …calibration, the driver is accurate within 1 ms relative to the broadcast time when tracking a sta…
33 …calibration relative to the PPS&nbsp;signal from a GPS&nbsp;receiver, the mean offset with a 2.4-G…
37 <p>The driver processes 8-kHz &mu;-law companded codec samples using maximum-likelihood techniques …
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/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9287_attach.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
85 .totalSizeDesired = { -55, -55, -55, -55, -62 }, in ar9287AniSetup()
86 .coarseHigh = { -14, -14, -14, -14, -12 }, in ar9287AniSetup()
87 .coarseLow = { -64, -64, -64, -64, -70 }, in ar9287AniSetup()
88 .firpwr = { -78, -78, -78, -78, -80 }, in ar9287AniSetup()
102 AH5416(ah)->ah_ani_function &= ~ HAL_ANI_NOISE_IMMUNITY_LEVEL; in ar9287AniSetup()
137 ah = &ahp->ah_priv.h; in ar9287Attach()
142 AH_PRIVATE(ah)->ah_eepromRead = ath_hal_EepromDataRead; in ar9287Attach()
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/dev/ath/
H A Dif_athioctl.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
33 * Ioctl-related defintions for the Atheros Wireless LAN controller driver.
82 u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */
83 u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */
102 /* rx PHY error per-code counts */
113 u_int32_t ast_per_cal; /* periodic calibration calls */
114 u_int32_t ast_per_calfail;/* periodic calibration failed */
115 u_int32_t ast_per_rfgain; /* periodic calibration rfgain reset */
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
246 centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); in ar9300_get_channel_centers()
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H A Dar9300.h48 #define INIT_RSSI_BEACON_WEIGHT 8 /* ave beacon rssi weight (0-16) */
51 * Various fifo fill before Tx start, in 64-byte units
55 #define MAX_TX_FIFO_THRESHOLD (( 4096 / 64) - 1)
151 * Per-channel ANI state private to the driver.
178 u_int32_t cycle_count; /* Last cycle_count (can detect wrap-around) */
195 ((AH9300(ah)->ah_proc_phy_err & HAL_PROCESS_ANI))
211 u_int32_t ast_ani_reset; /* ANI parameters zero'd for non-STA */
317 (iniarray)->ia_array = (const u_int32_t *)(array); \
318 (iniarray)->ia_rows = (rows); \
319 (iniarray)->ia_columns = (columns); \
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/freebsd/sys/x86/x86/
H A Dtsc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1998-2003 Poul-Henning Kamp
66 &tsc_is_invariant, 0, "Indicates whether the TSC is P-state invariant");
80 &tsc_shift, 0, "Shift to pre-apply for the maximum TSC frequency");
89 "Disable early TSC frequency calibration");
168 * we can use this value until late calibration is complete.
216 for (i = 0; i < sizeof(brand) - 1; i++) in tsc_freq_intel_brand()
220 p -= 5; in tsc_freq_intel_brand()
234 #define C2D(c) ((c) - '0') in tsc_freq_intel_brand()
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/freebsd/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_reset.c1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2006 Atheros Communications, Inc.
50 { 1, 0x46, 96 }, /* 2312 -19 */
51 { 1, 0x46, 97 }, /* 2317 -18 */
52 { 1, 0x46, 98 }, /* 2322 -17 */
53 { 1, 0x46, 99 }, /* 2327 -16 */
54 { 1, 0x46, 100 }, /* 2332 -15 */
55 { 1, 0x46, 101 }, /* 2337 -14 */
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