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/linux/Documentation/devicetree/bindings/net/pcs/
H A Dsnps,dw-xpcs.yaml18 Synopsys PMA (also called DesignWare Consumer/Enterprise PHY) although in
28 - description: Synopsys DesignWare XPCS with none or unknown PMA
30 - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA
32 - description: Synopsys DesignWare XPCS with Consumer Gen2 3G PMA
34 - description: Synopsys DesignWare XPCS with Consumer Gen2 6G PMA
36 - description: Synopsys DesignWare XPCS with Consumer Gen4 3G PMA
38 - description: Synopsys DesignWare XPCS with Consumer Gen4 6G PMA
40 - description: Synopsys DesignWare XPCS with Consumer Gen5 10G PMA
42 - description: Synopsys DesignWare XPCS with Consumer Gen5 12G PMA
83 PCS/PMA layer can be clocked by an internal reference clock source
/linux/rust/kernel/net/phy/
H A Dreg.rs32 /// // read C45 PMA/PMD control 1 register
156 /// Separated PMA (1).
158 /// Separated PMA (2).
160 /// Separated PMA (3).
162 /// Separated PMA (4).
164 /// OFDM PMA/PMD.
/linux/drivers/net/phy/
H A Dphy-c45.c16 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities
35 * genphy_c45_pma_can_sleep - checks if the PMA have sleep support
50 * genphy_c45_pma_resume - wakes up the PMA module
64 * genphy_c45_pma_suspend - suspends the PMA module
129 * PMA/PMD type selection is 1.7.5:0 not 1.7.3:0. See 45.2.1.6.1 in genphy_c45_pma_setup_forced()
317 * are controlled through the PMA/PMD MMD registers.
598 * genphy_c45_read_pma - read link speed etc from PMA
648 * genphy_c45_read_mdix - read mdix status from PMA
921 /* IEEE 802.3cg-2019 45.2.1.186b 10BASE-T1L PMA status register in genphy_c45_read_eee_abilities()
954 * genphy_c45_pma_baset1_read_abilities - read supported baset1 link modes from PMA
[all...]
/linux/Documentation/devicetree/bindings/net/
H A Dxlnx,axi-ethernet.yaml101 - description: MGT reference clock (used by optional internal PCS/PMA PHY)
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
122 modes, where "pcs-handle" should be used to point to the PCS/PMA PHY,
/linux/drivers/net/pcs/
H A Dpcs-xpcs.c607 if (xpcs->info.pma == MP_FBNIC_XPCS_PMA_100G_ID) { in xpcs_switch_interface_mode()
710 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_config_aneg_c37_sgmii()
789 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_config_aneg_c37_1000basex()
810 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) {
922 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_get_state_c73()
1382 /* Find out PMA/PMD ID from MMD 1 device ID registers */
1398 /* Set the PMA ID if it hasn't been pre-initialized */ in xpcs_identify()
1399 if (xpcs->info.pma == DW_XPCS_PMA_ID_NATIVE) in xpcs_identify()
1400 xpcs->info.pma = id; in xpcs_identify()
1586 xpcs->info.pma in xpcs_create_fwnode()
[all...]
H A Dpcs-xpcs.h98 static const struct dw_xpcs_info _name = { .pcs = _pcs, .pma = _pma }
/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_phy.c119 /* PMA Standard Device Identifier 2: Address 1.3 */ in aq_phy_init_phy_id()
137 /* PMA Standard Device Identifier: in aq_phy_init()
/linux/drivers/net/ethernet/sfc/falcon/
H A Dqt202x_phy.c184 /* The PHY can get stuck in a state where it reports PHY_XS and PMA/PMD in qt2025c_bug17190_workaround()
186 * persisting for a couple of seconds, we switch PMA/PMD loopback in qt2025c_bug17190_workaround()
203 netif_dbg(efx, hw, efx->net_dev, "bashing QT2025C PMA/PMD\n"); in qt2025c_bug17190_workaround()
284 /* PMA/PMD loopback sets RXIN to inverse polarity and the firmware in qt2025c_select_phy_mode()
H A Dtxc43128_phy.c182 /* Reset the PMA/PMD MMD. The documentation is explicit that this does a
211 /* Set PMA to test into loopback using Mt Diablo reg as per app note */ in txc_bist_one()
406 /* Analog register bank in PMA/PMD, PHY XS */ in txc_set_power()
/linux/arch/riscv/include/asm/
H A Dpgtable-64.h118 * 00 - PMA Normal Cacheable, No change to implied PMA memory type
135 * 01110 - PMA Weakly-ordered, Cacheable, Bufferable, Shareable, Non-trustable
H A Derrata_list.h78 * and set the non-0 PMA type if applicable.
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml79 clock source for the reference clock used in the PHY and PMA digital
147 WIZ node should have subnodes for each of the PMA common refclock
H A Dcdns,dphy.yaml23 - description: PMA state machine clock
H A Dsamsung,usb3-drd-phy.yaml80 - const: pma
/linux/include/linux/pcs/
H A Dpcs-xpcs.h48 u32 pma;
46 u32 pma; global() member
/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c220 /* PHY PMA common registers */
225 /* PHY PMA lane registers */
573 /* PHY PMA lane registers configurations */ in cdns_sierra_phy_init()
585 /* PMA common registers configurations */ in cdns_sierra_phy_init()
595 /* PMA lane registers configurations */ in cdns_sierra_phy_init()
1133 dev_err(dev, "Failed to init PHY PMA common CDB regmap\n"); in cdns_regmap_init_blocks()
1145 dev_err(dev, "Failed to init PHY PMA lane CDB regmap\n"); in cdns_regmap_init_blocks()
1318 /* PHY PMA lane registers configurations */ in cdns_sierra_phy_configure_multilink()
1330 /* PMA common registers configurations */ in cdns_sierra_phy_configure_multilink()
1340 /* PMA lane registers configurations */ in cdns_sierra_phy_configure_multilink()
[all …]
H A Dphy-cadence-torrent.c168 /* PMA TX Lane registers */
189 /* PMA RX Lane registers */
235 /* PHY PMA common registers */
1219 "timeout waiting for PMA common ready\n"); in cdns_torrent_dp_wait_pma_cmn_ready()
1268 /* PMA lane configuration to deal with multi-link operation */ in cdns_torrent_dp_pma_cmn_rate()
1321 /* PMA common configuration 19.2MHz */ in cdns_torrent_dp_configure_rate()
1324 /* PMA common configuration 25MHz */ in cdns_torrent_dp_configure_rate()
1327 /* PMA common configuration 100MHz */ in cdns_torrent_dp_configure_rate()
1735 * PHY PMA registers configuration functions in cdns_torrent_dp_common_init()
2305 dev_err(dev, "Failed to init PHY PMA common CDB regmap\n"); in cdns_torrent_regmap_init()
[all …]
/linux/drivers/infiniband/hw/hfi1/
H A Dopa_compat.h21 /* OPA PMA attribute IDs */
/linux/include/rdma/
H A Dib_pma.h14 * PMA class portinfo capability mask bits
/linux/Documentation/devicetree/bindings/display/bridge/
H A Dcdns,mhdp8546.yaml24 The AUX and PMA registers are not part of this range, they are instead
/linux/drivers/phy/samsung/
H A Dphy-exynos5-usbdrd.c264 /* PMA registers */
679 /* link pipe_clock selection to pclk of PMA */ in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
691 /* PMA power off */ in exynos5_usbdrd_usbdp_g2_v4_ctrl_pma_ready()
1393 * trying to access PMA registers in exynos2200_usbdrd_phy_init()
1460 /* PMA disable */ in exynos5_usbdrd_usb_v3p1_pipe_override()
1687 * trying to access PMA registers in exynos5_usbdrd_gs101_phy_init()
2309 reg = devm_platform_ioremap_resource_byname(pdev, "pma"); in exynos5_usbdrd_phy_probe()
/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h158 #define XAE_PPST_OFFSET 0x00000030 /* PCS PMA Soft Temac Status Reg */
359 /* Xilinx PCS/PMA PHY register for switching 1000BaseX or SGMII */
476 * @pcs_phy: Reference to PCS/PMA PHY if used
/linux/arch/mips/txx9/rbtx4927/
H A Dirq.c79 * TXX9_IRQ_BASE+23 TX4927 PCI PCI-PMA (not used)
/linux/sound/pci/aw2/
H A Dsaa7146.h70 #define PMA (1UL << 30) macro
/linux/drivers/fpga/
H A Daltera-cvp.c35 #define VSE_CVP_MODE_CTRL_HIP_CLK_SEL BIT(1) /* PMA (1) or fabric clock (0) */
355 /* switch from fabric to PMA clock */ in altera_cvp_write_init()

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