| /linux/drivers/clk/ |
| H A D | clk-stm32h7.c | 86 "pll1_q", "pll2_r", "pll3_r", "hsi_ker" };
98 "pclk1", "pll2_p", "pll3_r", "lse_ck", "lsi_ck", "per_ck" };
101 "pclk4", "pll2_p", "pll3_r", "lse_ck", "lsi_ck", "per_ck" };
109 "pclk1", "pll3_r", "hsi_ker", "csi_ker" };
112 "pclk4", "pll3_r", "hsi_ker", "csi_ker" };
128 static const char * const adc_src[] = { "pll2_p", "pll3_r", "per_ck" };
147 static const char * const ltdc_src[] = {"pll3_r"};
972 M_ODF("pll3_r", "vco3", RCC_PLLCFGR, 24, RCC_PLL3DIVR, 24, 7),
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | st,stm32-i2s.yaml | 92 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| H A D | st,stm32-sai.yaml | 186 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| /linux/drivers/clk/stm32/ |
| H A D | clk-stm32mp13.c | 550 "ck_axi", "pll3_r", "pll4_p", "ck_per"
582 "ck_axi", "pll3_r", "pll4_p", "ck_per"
594 "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "pll3_r"
598 "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "spdif_ck_symb", "pll3_r"
602 "ck_axi", "pll3_r", "pll4_p", "ck_hsi"
610 "pll4_p", "pll3_q", "i2s_ckin", "ck_per", "pll3_r"
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| H A D | clk-stm32mp1.c | 143 "ck_axi", "pll3_r", "pll4_p", "ck_hsi"
147 "ck_mcu", "pll3_r", "pll4_p", "ck_hsi"
151 "ck_axi", "pll3_r", "pll4_p", "ck_per"
155 "ck_axi", "pll3_r", "pll4_p", "ck_per"
187 "pll4_p", "pll3_q", "i2s_ckin", "ck_per", "pll3_r"
243 "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "pll3_r"
247 "pll4_q", "pll3_q", "i2s_ckin", "ck_per", "spdif_ck_symb", "pll3_r"
1813 COMPOSITE(PLL3_R, "pll3_r", PARENT("pll3"), 0,
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| /linux/include/dt-bindings/clock/ |
| H A D | stm32h7-clks.h | 44 #define PLL3_R 40 macro
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| H A D | stm32mp13-clks.h | 33 #define PLL3_R 18 macro
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| H A D | stm32mp1-clks.h | 197 #define PLL3_R 188 macro
|
| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157c-osd32mp1-red.dts | 117 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc CK_PER>, <&rcc PLL3_R>;
|
| H A D | stm32mp15xx-dkx.dtsi | 439 clocks = <&rcc SPI2>, <&rcc SPI2_K>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
501 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|
| H A D | stm32mp15xx-dhcom-pdk2.dtsi | 227 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| H A D | stm32mp135f-dhcor-dhsbc.dts | 278 clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| H A D | stm32mp15xx-dhcor-avenger96.dtsi | 368 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
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| H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 446 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
|