| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | fsl,imx8qxp-pxl2dpi.yaml | 7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
19 The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8qxp-tqma8xqp.dtsi | 12 model = "TQ-Systems i.MX8QXP TQMa8XQP";
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| H A D | imx8qxp-tqma8xqps.dtsi | 12 model = "TQ-Systems i.MX8QXP TQMa8XQPS";
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| H A D | imx8qxp-tqma8xqp-mba8xx.dts | 14 model = "TQ-Systems i.MX8QXP TQMa8XQP on MBa8Xx";
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| H A D | imx8qxp-tqma8xqps-mb-smarc-2.dts | 14 model = "TQ-Systems i.MX8QXP TQMa8XQPS on MB-SMARC-2";
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-imx-lpi2c.txt | 6 - "fsl,imx8qxp-lpi2c" for LPI2C compatible with the one integrated on i.MX8QXP soc
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| /freebsd/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | fsl,imx8qxp-dc-gammacor.yaml | 7 title: Freescale i.MX8qxp Display Controller Gamma Correction Unit
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| H A D | fsl,imx8qxp-dc-safety.yaml | 7 title: Freescale i.MX8qxp Display Controller Safety Unit
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| H A D | fsl,imx8qxp-dc-layerblend.yaml | 7 title: Freescale i.MX8qxp Display Controller Layer Blend Unit
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| H A D | fsl,imx8qxp-dc-matrix.yaml | 7 title: Freescale i.MX8qxp Display Controller Color Matrix
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| H A D | fsl,imx8qxp-dc-filter.yaml | 7 title: Freescale i.MX8qxp Display Controller Filter Unit
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| H A D | fsl,imx8qxp-dc-blitblend.yaml | 7 title: Freescale i.MX8qxp Display Controller Blit Blend Unit
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| H A D | fsl,imx8qxp-dc-tcon.yaml | 7 title: Freescale i.MX8qxp Display Controller Timing Controller
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| H A D | fsl,imx8qxp-dc-rop.yaml | 7 title: Freescale i.MX8qxp Display Controller Raster Operation Unit
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| H A D | fsl,imx8qxp-dc-constframe.yaml | 7 title: Freescale i.MX8qxp Display Controller Constant Frame
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| H A D | fsl,imx8qxp-dc-clut.yaml | 7 title: Freescale i.MX8qxp Display Controller Color Lookup Table
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| H A D | fsl,imx8qxp-dc-dither.yaml | 7 title: Freescale i.MX8qxp Display Controller Dither Unit
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| H A D | fsl,imx8qxp-dc-signature.yaml | 7 title: Freescale i.MX8qxp Display Controller Signature Unit
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| H A D | fsl,imx8qxp-dc.yaml | 7 title: Freescale i.MX8qxp Display Controller
10 The Freescale i.MX8qxp Display Controller(DC) is comprised of three main
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| H A D | fsl,imx8qxp-dc-framegen.yaml | 7 title: Freescale i.MX8qxp Display Controller Frame Generator
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| H A D | fsl,imx8qxp-dc-axi-performance-counter.yaml | 7 title: Freescale i.MX8qxp Display Controller AXI Performance Counter
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| H A D | fsl,imx8qxp-dc-command-sequencer.yaml | 7 title: Freescale i.MX8qxp Display Controller Command Sequencer
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-fsl-lpspi.txt | 6 - "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | fsl-lpuart.txt | 14 on i.MX8QXP SoC with 32-bit little-endian register organization
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