xref: /freebsd/sys/contrib/device-tree/Bindings/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*833e5d42SEmmanuel Vadot%YAML 1.2
3*833e5d42SEmmanuel Vadot---
4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-axi-performance-counter.yaml#
5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*833e5d42SEmmanuel Vadot
7*833e5d42SEmmanuel Vadottitle: Freescale i.MX8qxp Display Controller AXI Performance Counter
8*833e5d42SEmmanuel Vadot
9*833e5d42SEmmanuel Vadotdescription: |
10*833e5d42SEmmanuel Vadot  Performance counters are provided to allow measurement of average bandwidth
11*833e5d42SEmmanuel Vadot  and latency during operation. The following features are supported:
12*833e5d42SEmmanuel Vadot
13*833e5d42SEmmanuel Vadot  * Manual and timer controlled measurement mode.
14*833e5d42SEmmanuel Vadot
15*833e5d42SEmmanuel Vadot  * Measurement counters:
16*833e5d42SEmmanuel Vadot    - GLOBAL_COUNTER for overall measurement time
17*833e5d42SEmmanuel Vadot    - BUSY_COUNTER for number of data bus busy cycles
18*833e5d42SEmmanuel Vadot    - DATA_COUNTER for number of data transfer cycles
19*833e5d42SEmmanuel Vadot    - TRANSFER_COUNTER for number of transfers
20*833e5d42SEmmanuel Vadot    - ADDRBUSY_COUNTER for number of address bus busy cycles
21*833e5d42SEmmanuel Vadot    - LATENCY_COUNTER for average latency
22*833e5d42SEmmanuel Vadot
23*833e5d42SEmmanuel Vadot  * Counter overflow detection.
24*833e5d42SEmmanuel Vadot
25*833e5d42SEmmanuel Vadot  * Outstanding Transfer Counters (OTC) which are used for latency measurement
26*833e5d42SEmmanuel Vadot    have to run immediately after reset, but can be disabled by software when
27*833e5d42SEmmanuel Vadot    there is no need for latency measurement.
28*833e5d42SEmmanuel Vadot
29*833e5d42SEmmanuel Vadotmaintainers:
30*833e5d42SEmmanuel Vadot  - Liu Ying <victor.liu@nxp.com>
31*833e5d42SEmmanuel Vadot
32*833e5d42SEmmanuel Vadotproperties:
33*833e5d42SEmmanuel Vadot  compatible:
34*833e5d42SEmmanuel Vadot    const: fsl,imx8qxp-dc-axi-performance-counter
35*833e5d42SEmmanuel Vadot
36*833e5d42SEmmanuel Vadot  reg:
37*833e5d42SEmmanuel Vadot    maxItems: 1
38*833e5d42SEmmanuel Vadot
39*833e5d42SEmmanuel Vadot  clocks:
40*833e5d42SEmmanuel Vadot    maxItems: 1
41*833e5d42SEmmanuel Vadot
42*833e5d42SEmmanuel Vadotrequired:
43*833e5d42SEmmanuel Vadot  - compatible
44*833e5d42SEmmanuel Vadot  - reg
45*833e5d42SEmmanuel Vadot  - clocks
46*833e5d42SEmmanuel Vadot
47*833e5d42SEmmanuel VadotadditionalProperties: false
48*833e5d42SEmmanuel Vadot
49*833e5d42SEmmanuel Vadotexamples:
50*833e5d42SEmmanuel Vadot  - |
51*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/imx8-lpcg.h>
52*833e5d42SEmmanuel Vadot
53*833e5d42SEmmanuel Vadot    pmu@5618f000 {
54*833e5d42SEmmanuel Vadot        compatible = "fsl,imx8qxp-dc-axi-performance-counter";
55*833e5d42SEmmanuel Vadot        reg = <0x5618f000 0x90>;
56*833e5d42SEmmanuel Vadot        clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;
57*833e5d42SEmmanuel Vadot    };
58