xref: /freebsd/sys/contrib/device-tree/Bindings/serial/fsl-lpuart.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* Freescale low power universal asynchronous receiver/transmitter (lpuart)
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties:
4*c66ec88fSEmmanuel Vadot- compatible :
5*c66ec88fSEmmanuel Vadot  - "fsl,vf610-lpuart" for lpuart compatible with the one integrated
6*c66ec88fSEmmanuel Vadot    on Vybrid vf610 SoC with 8-bit register organization
7*c66ec88fSEmmanuel Vadot  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
8*c66ec88fSEmmanuel Vadot    on LS1021A SoC with 32-bit big-endian register organization
9*c66ec88fSEmmanuel Vadot  - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
10*c66ec88fSEmmanuel Vadot    on LS1028A SoC with 32-bit little-endian register organization
11*c66ec88fSEmmanuel Vadot  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
12*c66ec88fSEmmanuel Vadot    on i.MX7ULP SoC with 32-bit little-endian register organization
13*c66ec88fSEmmanuel Vadot  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
14*c66ec88fSEmmanuel Vadot    on i.MX8QXP SoC with 32-bit little-endian register organization
15*c66ec88fSEmmanuel Vadot  - "fsl,imx8qm-lpuart" for lpuart compatible with the one integrated
16*c66ec88fSEmmanuel Vadot    on i.MX8QM SoC with 32-bit little-endian register organization
17*c66ec88fSEmmanuel Vadot- reg : Address and length of the register set for the device
18*c66ec88fSEmmanuel Vadot- interrupts : Should contain uart interrupt
19*c66ec88fSEmmanuel Vadot- clocks : phandle + clock specifier pairs, one for each entry in clock-names
20*c66ec88fSEmmanuel Vadot- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
21*c66ec88fSEmmanuel Vadot  bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
22*c66ec88fSEmmanuel Vadot  to access lpuart controller registers, it also requires "baud" clock for
23*c66ec88fSEmmanuel Vadot  module to receive/transmit data.
24*c66ec88fSEmmanuel Vadot
25*c66ec88fSEmmanuel VadotOptional properties:
26*c66ec88fSEmmanuel Vadot- dmas: A list of two dma specifiers, one for each entry in dma-names.
27*c66ec88fSEmmanuel Vadot- dma-names: should contain "tx" and "rx".
28*c66ec88fSEmmanuel Vadot- rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt
29*c66ec88fSEmmanuel Vadot
30*c66ec88fSEmmanuel VadotNote: Optional properties for DMA support. Write them both or both not.
31*c66ec88fSEmmanuel Vadot
32*c66ec88fSEmmanuel VadotExample:
33*c66ec88fSEmmanuel Vadot
34*c66ec88fSEmmanuel Vadotuart0: serial@40027000 {
35*c66ec88fSEmmanuel Vadot		compatible = "fsl,vf610-lpuart";
36*c66ec88fSEmmanuel Vadot		reg = <0x40027000 0x1000>;
37*c66ec88fSEmmanuel Vadot		interrupts = <0 61 0x00>;
38*c66ec88fSEmmanuel Vadot		clocks = <&clks VF610_CLK_UART0>;
39*c66ec88fSEmmanuel Vadot		clock-names = "ipg";
40*c66ec88fSEmmanuel Vadot		dmas = <&edma0 0 2>,
41*c66ec88fSEmmanuel Vadot			<&edma0 0 3>;
42*c66ec88fSEmmanuel Vadot		dma-names = "rx","tx";
43*c66ec88fSEmmanuel Vadot	};
44